Invention Grant
- Patent Title: Junction-isolated blocking voltage structures with integrated protection structures
- Patent Title (中): 具有集成保护结构的隔离隔离电压结构
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Application No.: US14446205Application Date: 2014-07-29
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Publication No.: US09356011B2Publication Date: 2016-05-31
- Inventor: David J. Clarke , Javier Alejandro Salcedo , Brian B. Moane , Juan Luo , Seamus Murnane , Kieran K. Heffernan , John Twomey , Stephen Denis Heffernan , Gavin Patrick Cosgrave
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: ANALOG DEVICES, INC.
- Current Assignee: ANALOG DEVICES, INC.
- Current Assignee Address: US MA Norwood
- Agency: Knobbe Martens Olson & Bear LLP
- Main IPC: H01L29/747
- IPC: H01L29/747 ; H01L27/02 ; H01L29/66 ; H01L29/06 ; H01L27/06 ; H01L29/74

Abstract:
Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.
Public/Granted literature
- US20140332843A1 JUNCTION-ISOLATED BLOCKING VOLTAGE STRUCTURES WITH INTEGRATED PROTECTION STRUCTURES Public/Granted day:2014-11-13
Information query
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