Invention Grant
US09397168B2 Method to define the active region of a transistor employing a group III-V semiconductor material 有权
使用III-V族半导体材料限定晶体管的有源区的方法

Method to define the active region of a transistor employing a group III-V semiconductor material
Abstract:
A group III-V transistor device employing a novel layout for isolating and/or defining the active region is provided. A group III-V heterojunction is arranged over or within a substrate, and an inner drain electrode is arranged over the group III-V heterojunction. A gate has a ring shape and is arranged over the group III-V heterojunction around the inner drain electrode. An outer source electrode has a ring-shaped region arranged over the group III-V heterojunction around the gate. A method for manufacturing the group III-V transistor device is also provided.
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