发明授权
US09455011B2 Methods and systems to read a magnetic tunnel junction (MTJ) based memory cell based on a pulsed read current
有权
基于脉冲读取电流读取基于磁隧道结(MTJ)的存储单元的方法和系统
- 专利标题: Methods and systems to read a magnetic tunnel junction (MTJ) based memory cell based on a pulsed read current
- 专利标题(中): 基于脉冲读取电流读取基于磁隧道结(MTJ)的存储单元的方法和系统
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申请号: US14350997申请日: 2012-03-25
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公开(公告)号: US09455011B2公开(公告)日: 2016-09-27
- 发明人: Arijit Raychowdhury , David Kencke , Brian Doyle , Charles Kuo , James Tschanz , Fatih Hamzaoglu , Yih Wang , Roksana Golizadeh Mojarad
- 申请人: Arijit Raychowdhury , David Kencke , Brian Doyle , Charles Kuo , James Tschanz , Fatih Hamzaoglu , Yih Wang , Roksana Golizadeh Mojarad
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Garrett IP, LLC
- 国际申请: PCT/US2012/030490 WO 20120325
- 国际公布: WO2013/147728 WO 20131003
- 主分类号: G11C11/00
- IPC分类号: G11C11/00 ; G11C11/16 ; G11C5/12 ; G11C13/00
摘要:
Methods and systems to read a logic value stored in a magnetic tunnel junction (MTJ)-based memory cell based on a pulsed read current, with time between pulses to permit the MTJ to relax towards the magnetization orientation between the pulses, which may reduce build-up of momentum within the MTJ, and which may reduce and/or eliminate inadvertent re-alignment of a magnetization orientation. A sequence of symmetric and/or non-symmetric pulses may be applied to a wordline (WL) to cause a pre-charged bit line (BL) capacitance to discharge a pulsed read current through the MTJ, resulting in a corresponding sequence of voltage changes on the BL. The BL voltage changes may be integrated over the sequence of read current pulses, and a stored logic value may be determined based on the integrated voltage changes. The pre-charged BL capacitance may also serve as the voltage integrator.
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