Invention Grant
US09489989B2 Voltage regulators, memory circuits, and operating methods thereof 有权
电压调节器,存储器电路及其操作方法

Voltage regulators, memory circuits, and operating methods thereof
Abstract:
A voltage regulator includes an output stage electrically coupled with an output end of the voltage regulator. The output stage includes at least one transistor having a bulk and a drain. At least one back-bias circuit is electrically coupled with the bulk of the at least one transistor. The at least one back-bias circuit is configured to provide a bulk voltage, such that the bulk and the drain of the at least one transistor are reverse biased during a standby mode of a memory array that is electrically coupled with the voltage regulator.
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