Invention Grant
- Patent Title: Method and apparatus for determining status element total with sequentially coupled counting status circuits
- Patent Title (中): 用顺序耦合的计数状态电路确定状态元件总数的方法和装置
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Application No.: US14055656Application Date: 2013-10-16
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Publication No.: US09548135B2Publication Date: 2017-01-17
- Inventor: Yih-Shan Yang , Shou-Nan Hung , Chun-Hsiung Hung , Yao-Jen Kuo , Meng-Fan Chang
- Applicant: Macronix International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes Beffel & Wolfeld LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F11/07 ; G11C29/02 ; G06F11/08 ; G11C29/42 ; G11C29/44 ; G11C16/26

Abstract:
Counting status circuits are electrically coupled to corresponding status elements. The status elements selectably store a bit status of a bit line coupled to a memory array. The bit status can indicate one of at least pass and fail. The counting status circuits are electrically coupled to each other in a sequential order. Control logic causes processing of the counting status circuits in the sequential order to determine a total of the memory elements that store the bit status. The total number of memory elements that store the bit status indicate the number of error bits or non-error bits, which can help determine whether there are too many errors to be fixed by error correction codes.
Public/Granted literature
- US20140258794A1 MEMORY PAGE BUFFER Public/Granted day:2014-09-11
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