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公开(公告)号：US11676669B2
公开(公告)日：2023-06-13
申请号：US17205836
申请日：2021-03-18
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yih-Shan Yang
CPC classification number: G11C16/30 , G11C16/0483 , G01K2217/00
Abstract: An integrated circuit includes a memory and peripheral circuits with a temperature sensor used to automatically adjust operating voltages. The temperature sensor includes a first circuit to generate a temperature-dependent voltage (TDV) that is dependent on an operating temperature of the integrated circuit, and a second circuit to generate a plurality of temperature reference voltages, based on or more codes. One or more comparator circuits compare individual ones of the plurality of reference voltages with the TDV, to generate one or more comparison signals that are indicative of the operating temperature of the integrated circuit.
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2.发明授权公开(公告)号：US11056172B1
公开(公告)日：2021-07-06
申请号：US16860349
申请日：2020-04-28
Applicant: MACRONIX International Co., Ltd.
Inventor： Che-Ping Chen , Ya-Jui Lee , Shin-Jang Shen , Yih-Shan Yang
IPC: G11C7/22 , G11C11/4076 , G11C11/4074 , G11C11/4099 , G11C11/4094 , G11C11/408 , G11C16/04 , G11C16/32 , G11C16/34 , G11C16/26 , G11C16/06
Abstract: A flash memory and an operation method thereof are provided. The flash memory includes a plurality of memory cell strings and a pass voltage generator. Each of the memory cell strings includes a plurality of memory cells. The pass voltage generator is configured to provide a pass voltage to a plurality of word lines of a plurality of unselected memory cells of a selected memory string. During a reading operation, the pass voltage generator raises the pass voltage from a first voltage at a first time point, and raises the pass voltage to a second voltage at a second time point. The second voltage is lower than a target voltage times a preset ratio The first time point is earlier than a start time point of a bit line voltage received by the selected memory cell, and the second time point occurs at the start time point of the bit line voltage.
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公开(公告)号：US11984169B2
公开(公告)日：2024-05-14
申请号：US18142423
申请日：2023-05-02
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yih-Shan Yang
CPC classification number: G11C16/30 , G11C16/0483 , G01K2217/00
Abstract: An integrated circuit includes a memory and peripheral circuits with a temperature sensor used to automatically adjust operating voltages. The temperature sensor includes a first circuit to generate a temperature-dependent voltage (TDV) that is dependent on an operating temperature of the integrated circuit, and a second circuit to generate a plurality of temperature reference voltages, based on or more codes. One or more comparator circuits compare individual ones of the plurality of reference voltages with the TDV, to generate one or more comparison signals that are indicative of the operating temperature of the integrated circuit.
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公开(公告)号：US20190354130A1
公开(公告)日：2019-11-21
申请号：US16217919
申请日：2018-12-12
Applicant: MACRONIX International Co., Ltd.
Inventor： Yih-Shan Yang
IPC: G05F3/16
Abstract: A voltage subtracter and an operation method for subtracting voltages are provided. The voltage subtracter includes a first charge storage device and a second charge storage device. The first charge storage device receives a first voltage and a second voltage during a first time period, and storages a first difference voltage between the first voltage and the second voltage. The second charge storage device receives a reference ground voltage and the first voltage during a second time period, and storages a second difference voltage between the reference ground voltage and the first voltage. The first charge storage device and the second charge storage device are coupled to an output end during a second time period, and a charge sharing operation is operated on the first charge storage device and the second charge storage device to generate an output voltage on the output end.
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公开(公告)号：US10133287B2
公开(公告)日：2018-11-20
申请号：US14960657
申请日：2015-12-07
Applicant: Macronix International Co., Ltd.
Inventor： Yih-Shan Yang
Abstract: A semiconductor device includes an amplifier, a pass transistor, a compensation circuit, and a bias voltage generator. The amplifier has an output terminal. The pass transistor has a gate and an output terminal. The gate is coupled to the output terminal of the amplifier, and the output terminal of the pass transistor is coupled to a load. The compensation circuit is coupled between the output terminal of the amplifier and the output terminal of the pass transistor. The compensation circuit has a variable impedance. The bias voltage generator is coupled between the output terminal of the pass transistor and the compensation circuit.
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Patent Agency Ranking
公开(公告)号：US12101068B2
公开(公告)日：2024-09-24
申请号：US17349586
申请日：2021-06-16
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yih-Shan Yang
CPC classification number: H03F3/45632 , H03F3/45174 , H03F3/45273 , H03F3/45484 , H03K3/26 , H03K3/356034
Abstract: A voltage driver circuit for an output stage of an operational amplifier, or other circuits, includes a level shifter and an output driver including a source follower and a common source amplifier in a push-pull configuration. The level shifter generates a node voltage as a function of an input voltage on the input node. The output driver including a first transistor having a control terminal receiving the node voltage, and connected between a supply voltage and an output node, and a second transistor having a control terminal receiving the input voltage from the input node, and connected between the output node and a reference voltage, wherein the first and second transistors have a common conductivity type.
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公开(公告)号：US11016518B2
公开(公告)日：2021-05-25
申请号：US16217919
申请日：2018-12-12
Applicant: MACRONIX International Co., Ltd.
Inventor： Yih-Shan Yang
Abstract: A voltage subtracter includes a first charge storage device and a second charge storage device. The first charge storage device receives a first voltage and a second voltage during a first time period, and storages a first difference voltage between the first voltage and the second voltage. The second charge storage device receives a reference ground voltage and the first voltage during a second time period, and storages a second difference voltage between the reference ground voltage and the first voltage. The first charge storage device and the second charge storage device are coupled to an output end during a second time period, and a charge sharing operation is operatedon the first charge storage device and the second charge storage device to generate an output voltage on the output end.
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公开(公告)号：US09395733B2
公开(公告)日：2016-07-19
申请号：US13975155
申请日：2013-08-23
Applicant: Macronix International Co., Ltd.
Inventor： Yih-Shan Yang
Abstract: A circuit includes a detection node and a feedback node adapted to communicate with a reference circuit. A clamping transistor includes current conducting terminals and a gate coupled to the detection node. An amplifier transistor includes current conducting terminals in series with the current conducting terminals of the clamping transistor and a gate coupled to the detection node. The amplifier transistor is configured to cause a second voltage to be provided to the feedback node in response to the clamping transistor receiving a first voltage from the detection node.
Abstract translation: 电路包括检测节点和适于与参考电路通信的反馈节点。 钳位晶体管包括导电端子和耦合到检测节点的栅极。 放大器晶体管包括与钳位晶体管的电流导通端子串联的导电端子和耦合到检测节点的栅极。 放大器晶体管被配置为响应于钳位晶体管从检测节点接收第一电压而使第二电压被提供给反馈节点。
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公开(公告)号：US10768646B2
公开(公告)日：2020-09-08
申请号：US15454056
申请日：2017-03-09
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yih-Shan Yang
Abstract: A low dropout (LDO) regulating device includes a regulator and a pre-charger. The regulator is configured to adjust an output voltage provided to an output node in accordance with a voltage difference between a first reference voltage and a feedback voltage on a feedback node, wherein the feedback node is coupled to the output node. The pre-charger is electrically connected to the regulator, and is electrically connected to the feedback node for charge sharing.
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10.发明授权公开(公告)号：US10481965B2
公开(公告)日：2019-11-19
申请号：US15389238
申请日：2016-12-22
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor： Yih-Shan Yang , Shou-Nan Hung , Chun-Hsiung Hung , Yao-Jen Kuo , Meng-Fan Chang
IPC: G06F11/07 , G11C16/08 , G11C16/34 , G06F3/06 , G06F11/08 , G11C29/00 , G11C29/02 , G11C29/42 , G11C29/44 , G11C16/26
Abstract: Counting status circuits are electrically coupled to corresponding status elements. The status elements selectably store a bit status of a bit line coupled to a memory array. The bit status can indicate one of at least pass and fail. The counting status circuits are electrically coupled to each other in a sequential order. Control logic causes processing of the counting status circuits in the sequential order to determine a total of the memory elements that store the bit status. The total number of memory elements that store the bit status indicate the number of error bits or non-error bits, which can help determine whether there are too many errors to be fixed by error correction codes.
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