Invention Grant
- Patent Title: Gate and gate forming process
- Patent Title (中): 门和门形成过程
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Application No.: US14619085Application Date: 2015-02-11
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Publication No.: US09570578B2Publication Date: 2017-02-14
- Inventor: Keng-Jen Lin , Chien-Liang Lin , Yu-Ren Wang , Neng-Hui Yang
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/285 ; H01L21/28 ; H01L29/49 ; H01L21/322 ; H01L29/51
Abstract:
A gate forming process includes the following steps. A gate dielectric layer is formed on a substrate. A barrier layer is formed on the gate dielectric layer. A silicon seed layer and a silicon layer are sequentially and directly formed on the barrier layer, wherein the silicon seed layer and the silicon layer are formed by different precursors.
Public/Granted literature
- US20160233092A1 GATE AND GATE FORMING PROCESS Public/Granted day:2016-08-11
Information query
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