发明授权
- 专利标题： Method of fabricating semiconductor structure with improved critical dimension control
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申请号： US14989802申请日： 2016-01-07
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公开(公告)号： US09653345B1公开(公告)日： 2017-05-16
- 发明人: Shang-Nan Chou , Che-Yi Lin , En-Chiuan Liou , Yu-Ting Hung , Shin-Feng Su , Chia-Hsun Tseng
- 申请人： UNITED MICROELECTRONICS CORP.
- 申请人地址： TW Hsin-Chu
- 专利权人： UNITED MICROELECTRONICS CORP.
- 当前专利权人： UNITED MICROELECTRONICS CORP.
- 当前专利权人地址： TW Hsin-Chu
- 代理商 Winston Hsu; Scott Margo
- 主分类号： H01L21/76
- IPC分类号： H01L21/76 ; H01L21/768 ; H01L21/027 ; H01L21/308
摘要：
A method of fabricating a semiconductor structure for improving critical dimension control is provided in the present invention. The method includes the following steps. An inter metal dielectric (IMD) layer is formed on a semiconductor substrate, a patterned hard mask layer is formed on the IMD layer, and a first aperture is formed in the IMD layer. A first barrier layer is formed on the patterned hard mask layer and a surface of the first aperture, a first patterned resist is formed on the first barrier layer, and an etching process is performed to form a second aperture in the IMD layer by using the first patterned resist as a mask. The first patterned resist is kept from being poisoned because of the first barrier layer, and the critical dimension control of the semiconductor structure may be improved accordingly.
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