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公开(公告)号：US09746786B2
公开(公告)日：2017-08-29
申请号：US15260322
申请日：2016-09-09
发明人： Che-Yi Lin , En-Chiuan Liou , Yi-Jing Wang , Chia-Hsun Tseng
CPC分类号： G03F7/70633 , H01L21/02642 , H01L21/027 , H01L21/266 , H01L21/308 , H01L21/3081 , H01L21/3085 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L21/32139
摘要： An overlay mask includes a plurality of first patterns, a plurality of second patterns and a plurality of third patterns. The first patterns are arranged within a first pitch. The second patterns are arranged within a second pitch. A first portion of the third patterns are arranged alternately with the first patterns, within the first pitch, and a second portion of the third patterns are arranged alternately with the second patterns, within the second pitch, and the first pitch is not equal to the second pitch.
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公开(公告)号：US20170200721A1
公开(公告)日：2017-07-13
申请号：US15045258
申请日：2016-02-17
发明人： Chien-Hung Chen , Shih-Hsien Huang , Yu-Ru Yang , Chia-Hsun Tseng , Cheng-Tzung Tsai , Chun-Yuan Wu
IPC分类号： H01L27/092 , H01L21/02 , H01L21/306 , H01L29/165 , H01L21/8238
摘要： A semiconductor device includes a substrate, a first well formed in the substrate, a second well formed in the substrate, a first fin formed on the first well, and a second fin formed on the second well. The first well includes a first conductivity type, the second well includes a second conductivity type, and the first conductivity type and the second conductivity type are complementary to each other. The substrate includes a first semiconductor material. The first fin and the second fin include the first semiconductor material and a second semiconductor material. A lattice constant of the second semiconductor material is larger than a lattice constant of the first semiconductor material. The first semiconductor material in the first fin includes a first concentration, the first semiconductor material in the second fin includes a second concentration, and the second concentration is larger than the first concentration.
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公开(公告)号：US20160247678A1
公开(公告)日：2016-08-25
申请号：US14629491
申请日：2015-02-24
发明人： Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , An-Chi Liu , Chih-Wei Wu , Jyh-Shyang Jenq , Shih-Fang Hong , En-Chiuan Liou , Ssu-I Fu , Yu-Hsiang Hung , Chih-Kai Hsu , Mei-Chen Chen , Chia-Hsun Tseng
IPC分类号： H01L21/033 , H01L21/66
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3083 , H01L21/3086 , H01L21/3088 , H01L21/823431 , H01L22/12
摘要： A method of forming a semiconductor structure includes following steps. First of all, a patterned hard mask layer having a plurality of mandrel patterns is provided. Next, a plurality of first mandrels is formed on a substrate through the patterned hard mask. Following these, at least one sidewall image transferring (SIT) process is performed. Finally, a plurality of fins is formed in the substrate, wherein each of the fins has a predetermined critical dimension (CD), and each of the mandrel patterns has a CD being 5-8 times greater than the predetermined CD.
摘要翻译： 形成半导体结构的方法包括以下步骤。 首先，提供具有多个心轴图案的图案化的硬掩模层。 接下来，通过图案化的硬掩模在基板上形成多个第一心轴。 接下来，执行至少一个侧壁图像传送（SIT）处理。 最后，在基板上形成多个散热片，其中每个翅片具有预定的临界尺寸（CD），并且每个心轴图案具有比预定CD大5-8倍的CD。
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公开(公告)号：US09583568B2
公开(公告)日：2017-02-28
申请号：US14612300
申请日：2015-02-03
发明人： En-Chiuan Liou , Ssu-I Fu , Chia-Lin Lu , Shih-Hung Tsai , Chih-Wei Yang , Chia-Ching Lin , Chia-Hsun Tseng , Rai-Min Huang
IPC分类号： H01L29/66 , H01L21/84 , H01L27/06 , H01L29/78 , H01L29/06 , H01L21/762 , H01L27/12 , H01L21/76
CPC分类号： H01L29/0684 , H01L21/76 , H01L21/762 , H01L21/76232 , H01L27/1211 , H01L29/0649 , H01L29/6681 , H01L29/7846 , H01L29/7851
摘要： The present invention provides a semiconductor structure, including a substrate, a shallow trench isolation (STI) disposed in the substrate, a plurality of first fin structures disposed in the substrate, where each first fin structure and the substrate have same material, and a plurality of second fin structures disposed in the STI, where each second fin structure and the STI have same material.
摘要翻译： 本发明提供一种半导体结构，包括基板，设置在基板中的浅沟槽隔离（STI），设置在基板中的多个第一翅片结构，其中每个第一翅片结构和基板具有相同的材料，以及多个 设置在STI中的第二鳍结构，其中每个第二鳍结构和STI具有相同的材料。
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公开(公告)号：US09548216B1
公开(公告)日：2017-01-17
申请号：US14809270
申请日：2015-07-26
发明人： Yu-Te Chen , Chia-Hsun Tseng , En-Chiuan Liou , Chiung-Lin Hsu , Meng-Lin Tsai , Jan-Fu Yang , Yu-Ting Hung , Shin-Feng Su
IPC分类号： H01L21/76 , H01L21/321 , H01L21/225 , H01L21/3205 , H01L21/3105
CPC分类号： H01L21/2253 , H01L21/30604 , H01L21/3065 , H01L21/823412 , H01L21/823431 , H01L21/823807 , H01L21/823821
摘要： A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.
摘要翻译： 调整半导体器件的沟道宽度的方法包括提供分成第一区域和第二区域的衬底，其中衬底包括多个鳍片。 在第一区域内的翅片上执行第一注入工艺。 然后，对第二区域内的翅片执行第二注入工艺，其中第一注入工艺和第二注入工艺在包括掺杂剂种类，掺杂剂剂量或注入能量的至少一个条件中彼此不同。 之后，同时去除第一区域和第二区域内的部分散热片，以在第一区域内形成多个第一凹槽，在第二区域内形成多个第二凹槽。 最后，形成第一外延层和第二外延层以分别填充每个第一凹槽和每个第二凹槽。
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公开(公告)号：US09530646B2
公开(公告)日：2016-12-27
申请号：US14629491
申请日：2015-02-24
发明人： Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , An-Chi Liu , Chih-Wei Wu , Jyh-Shyang Jenq , Shih-Fang Hong , En-Chiuan Liou , Ssu-I Fu , Yu-Hsiang Hung , Chih-Kai Hsu , Mei-Chen Chen , Chia-Hsun Tseng
IPC分类号： H01L21/8234 , H01L21/033 , H01L21/66 , H01L21/308
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3083 , H01L21/3086 , H01L21/3088 , H01L21/823431 , H01L22/12
摘要： A method of forming a semiconductor structure includes following steps. First of all, a patterned hard mask layer having a plurality of mandrel patterns is provided. Next, a plurality of first mandrels is formed on a substrate through the patterned hard mask. Following these, at least one sidewall image transferring (SIT) process is performed. Finally, a plurality of fins is formed in the substrate, wherein each of the fins has a predetermined critical dimension (CD), and each of the mandrel patterns has a CD being 5-8 times greater than the predetermined CD.
摘要翻译： 形成半导体结构的方法包括以下步骤。 首先，提供具有多个心轴图案的图案化的硬掩模层。 接下来，通过图案化的硬掩模在基板上形成多个第一心轴。 接下来，执行至少一个侧壁图像传送（SIT）处理。 最后，在基板上形成多个散热片，其中每个翅片具有预定的临界尺寸（CD），并且每个心轴图案具有比预定CD大5-8倍的CD。
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公开(公告)号：US20160306274A1
公开(公告)日：2016-10-20
申请号：US14685615
申请日：2015-04-14
发明人： En-Chiuan Liou , Chia-Hsun Tseng , Tuan-Yen Yu , Po-Tsang Chen , Yi-Ting Chen
IPC分类号： G03F1/76 , H01L21/033
摘要： A manufacturing method of a pattern transfer mask includes the following steps. A basic mask is provided. The basic mask includes a plurality of patterns formed by a patterned absorber layer on a substrate according to a first writing layout. A photolithographic process is then performed by the basic mask to obtain individual depth of focus (iDoF) ranges of each of the patterns and a usable depth of focus (UDoF) range of the patterns. At least one constrain pattern dominating the UDoF range is selected from the patterns in the basic mask. The rest of the patterns except the constrain pattern are non-dominating patterns. A second writing layout is then generated for reducing a thickness of the patterned absorber layer in the constrain pattern or in the non-dominating patterns.
摘要翻译： 图案转印掩模的制造方法包括以下步骤。 提供基本的面具。 基本掩模包括根据第一写入布局在基板上由图案化的吸收层形成的多个图案。 然后通过基本掩模执行光刻处理，以获得每种图案的单独焦点深度（iDoF）范围和图案的可用深度（UDoF）范围。 从基本掩码中的图案中选择至少一个主导UDoF范围的约束图案。 除了约束模式之外的其余模式是非主导模式。 然后生成第二写入布局以减小约束图案中的图案化吸收层的厚度或以非主导图案的方式。
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公开(公告)号：US09964866B2
公开(公告)日：2018-05-08
申请号：US15065872
申请日：2016-03-10
发明人： Che-Yi Lin , En-Chiuan Liou , Chia-Hsun Tseng , Yi-Ting Chen , Chia-Hung Wang , Yi-Jing Wang
CPC分类号： G03F9/7003
摘要： A method of forming an integrated circuit includes the following steps. A substrate including a plurality of exposure fields is provided, and each of the exposure field includes a target portion and a set of alignment marks. Measure the set of alignment marks of each exposure field by a measuring system to obtain alignment data for the respective exposure field. Determine an exposure parameter corresponding to each exposure field and an exposure location on the target portion from the alignment data for the respective exposure field by a calculating system. Feedback the alignment data to a next substrate.
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公开(公告)号：US20170220728A1
公开(公告)日：2017-08-03
申请号：US15065872
申请日：2016-03-10
发明人： Che-Yi Lin , En-Chiuan Liou , Chia-Hsun Tseng , Yi-Ting Chen , Chia-Hung Wang , Yi-Jing Wang
CPC分类号： G03F9/7003
摘要： A method of forming an integrated circuit includes the following steps. A substrate including a plurality of exposure fields is provided, and each of the exposure field includes a target portion and a set of alignment marks. Measure the set of alignment marks of each exposure field by a measuring system to obtain alignment data for the respective exposure field. Determine an exposure parameter corresponding to each exposure field and an exposure location on the target portion from the alignment data for the respective exposure field by a calculating system. Feedback the alignment data to a next substrate.
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公开(公告)号：US09581898B2
公开(公告)日：2017-02-28
申请号：US14685615
申请日：2015-04-14
发明人： En-Chiuan Liou , Chia-Hsun Tseng , Tuan-Yen Yu , Po-Tsang Chen , Yi-Ting Chen
IPC分类号： G03F1/76 , G03F1/80 , H01L21/033
摘要： A manufacturing method of a pattern transfer mask includes the following steps. A basic mask is provided. The basic mask includes a plurality of patterns formed by a patterned absorber layer on a substrate according to a first writing layout. A photolithographic process is then performed by the basic mask to obtain individual depth of focus (iDoF) ranges of each of the patterns and a usable depth of focus (UDoF) range of the patterns. At least one constrain pattern dominating the UDoF range is selected from the patterns in the basic mask. The rest of the patterns except the constrain pattern are non-dominating patterns. A second writing layout is then generated for reducing a thickness of the patterned absorber layer in the constrain pattern or in the non-dominating patterns.
摘要翻译： 图案转印掩模的制造方法包括以下步骤。 提供基本的面具。 基本掩模包括根据第一写入布局在基板上由图案化的吸收层形成的多个图案。 然后通过基本掩模执行光刻处理，以获得每种图案的单独焦点深度（iDoF）范围和图案的可用深度（UDoF）范围。 从基本掩码中的图案中选择至少一个主导UDoF范围的约束图案。 除了约束模式之外的其余模式是非主导模式。 然后生成第二写入布局以减小约束图案中的图案化吸收层的厚度或以非主导图案的方式。
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