Invention Grant
- Patent Title: Approach for reducing pixel pitch using vertical transfer gates and implant isolation regions
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Application No.: US14490824Application Date: 2014-09-19
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Publication No.: US09659987B2Publication Date: 2017-05-23
- Inventor: Tzu-Jui Wang , Yuichiro Yamashita , Seiji Takahashi , Jen-Cheng Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L27/146
- IPC: H01L27/146

Abstract:
An active pixel sensor (APS) with a vertical transfer gate and a pixel transistor (e.g., a transfer transistor, a source follower transistor, a reset transistor, or a row select transistor) electrically isolated by an implant isolation region is provided. A semiconductor substrate has a photodetector buried therein. The vertical transfer gate extends into the semiconductor substrate with a channel region in electrical communication with the photodetector. The pixel transistor is arranged over the photodetector and configured to facilitate the pixel operation (e.g., reset, signal readout, etc.). The implant isolation region is arranged in the semiconductor substrate and surrounds and electrically isolates the pixel transistor. A method for manufacturing the APS is also provided.
Public/Granted literature
- US20160086984A1 Approach for Reducing Pixel Pitch using Vertical Transfer Gates and Implant Isolation Regions Public/Granted day:2016-03-24
Information query
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