Integrated circuit and clock data recovery circuit
Abstract:
An integrated circuit includes a comparator capable of generating an up/down signal by comparing a feedback signal with a reference signal; a restoration signal generation unit capable of enabling a restoration signal when the up/down signal maintains an identical value for greater than or equal to a first specific time and changes afterwards; a processing circuit including one or more stages for sequentially processing the up/down signal, wherein a last one of the one or more stages holds a process result thereof for a second specific time when the restoration signal is enabled; and a feedback unit capable of generating the feedback signal in response to the process result of the last stage.
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