A method for manufacturing an embedded flash memory device is provided. Memory and logic shallow trench isolation (STI) regions respectively extend into memory and logic regions of a substrate. The memory and logic STI regions have upper surfaces approximately coplanar with an upper surface of a pad layer overlying the substrate. A capping layer is formed overlying the logic region. A first etch is performed into the pad layer to expose memory gaps between the memory STI regions. A floating gate layer is formed filling the memory gaps. A second, dry etch is performed into the floating gate layer to etch the floating gate layer back to below upper surfaces of the capping layer and the memory STI regions. A third etch is performed into the memory STI regions to recess the memory STI regions. A fourth etch is performed into the floating gate layer to form floating gates.