Invention Grant
- Patent Title: Method of forming gate dielectric layer for MOS transistor
-
Application No.: US14588975Application Date: 2015-01-04
-
Publication No.: US09761687B2Publication Date: 2017-09-12
- Inventor: Han-Lin Hsu , Po-Lun Cheng , Chun-Liang Chen , Meng-Che Yeh , Shih-Jung Tu
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/28 ; H01L29/51 ; H01L29/02 ; H01L21/02
Abstract:
A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitridation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.
Public/Granted literature
- US20160196971A1 METHOD OF FORMING GATE DIELECTRIC LAYER FOR MOS TRANSISTOR Public/Granted day:2016-07-07
Information query
IPC分类:
