公开(公告)号：US20160196971A1

公开(公告)日：2016-07-07

申请号：US14588975

申请日：2015-01-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Han-Lin Hsu ,  Po-Lun Cheng ,  Chun-Liang Chen ,  Meng-Che Yeh ,  Shih-Jung Tu

IPC: H01L21/02 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L29/66477 ,  H01L21/02326 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518 ,  H01L29/6659

Abstract: A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitrdation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.

Abstract translation: 形成用于MOS晶体管的栅介质层的方法包括以下步骤。 在基板上形成栅极电介质层。 在栅介质层上进行氮化处理。 在栅介质层上进行包括具有不同退火温度的两个含氧退火步骤的多步氮化退火工艺。

公开(公告)号：US09761687B2

公开(公告)日：2017-09-12

申请号：US14588975

申请日：2015-01-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Han-Lin Hsu ,  Po-Lun Cheng ,  Chun-Liang Chen ,  Meng-Che Yeh ,  Shih-Jung Tu

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/51 ,  H01L29/02 ,  H01L21/02

CPC classification number: H01L29/66477 ,  H01L21/02326 ,  H01L21/02332 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518 ,  H01L29/6659

Abstract: A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitridation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.