Invention Grant
- Patent Title: Systems and methods to enhance passivation integrity
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Application No.: US15146012Application Date: 2016-05-04
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Publication No.: US09773716B2Publication Date: 2017-09-26
- Inventor: Ying-Chieh Liao , Han-Wei Yang , Chen-Chung Lai , Kang-Min Kuo , Bor-Zen Tien
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/31 ; H01L23/00 ; H01L23/48 ; H01L21/768 ; H01L23/482 ; H01L23/528 ; H01L29/40 ; H01L23/29 ; H01L23/532
Abstract:
A semiconductor device is disclosed in some embodiments. The device includes a substrate, and a layer disposed over the substrate. The layer includes an opening extending through the layer. A plurality of bar or pillar structures or a tapered region are arranged in a peripheral portion of the opening and laterally surround a central portion of the opening. A metal body extends through the central portion of the opening.
Public/Granted literature
- US20160247741A1 SYSTEMS AND METHODS TO ENHANCE PASSIVATION INTEGRITY Public/Granted day:2016-08-25
Information query
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