- 专利标题: Semiconductor device and method of forming a PoP device with embedded vertical interconnect units
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申请号: US14135415申请日: 2013-12-19
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公开(公告)号: US09842798B2公开(公告)日: 2017-12-12
- 发明人: Pandi C. Marimuthu , Yaojian Lin , Kang Chen , Yu Gu , Won Kyoung Choi
- 申请人: STATS ChipPAC, Ltd.
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC Pte. Ltd.
- 当前专利权人: STATS ChipPAC Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 代理机构: Patent Law Group: Atkins and Associates, P.C.
- 代理商 Robert D. Atkins
- 主分类号: H01L21/48
- IPC分类号: H01L21/48 ; H01L23/00 ; H01L21/56 ; H01L21/683 ; H01L23/498 ; H01L23/31 ; H01L23/538 ; H01L25/10 ; H01L25/065 ; H01L23/13 ; H01L23/14
摘要:
A semiconductor device has a substrate. A plurality of conductive vias is formed through the substrate. A conductive layer is formed over the substrate. An insulating layer is formed over conductive layer. A portion of the substrate is removed to expose the conductive vias. A plurality of vertical interconnect structures is formed over the substrate. A first semiconductor die is disposed over the substrate. A height of the vertical interconnect structures is less than a height of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and the vertical interconnect structures. A first portion of the encapsulant is removed from over the first semiconductor die while leaving a second portion of the encapsulant over the vertical interconnect structures. The second portion of the encapsulant is removed to expose the vertical interconnect structures. A second semiconductor die is disposed over the first semiconductor die.
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