METHOD FOR TEMPERATURE COMPENSATION OF A TIME BASIS
    1.
    发明公开
    METHOD FOR TEMPERATURE COMPENSATION OF A TIME BASIS 审中-公开
    方法进行温度补偿临时

    公开(公告)号:EP2132875A1

    公开(公告)日:2009-12-16

    申请号:EP08736166.3

    申请日:2008-04-11

    申请人: Microdul AG

    发明人: THOMMEN, Werner

    摘要: A method for temperature compensation of a time basis, driven by a quartz crystal oscillator, comprises a second oscillator having a linear frequency dependency on temperature. The method counts the pulses (65) of the quartz crystal oscillator for at least three different temperatures during time intervals (62, 63..) given by a predetermined number of pulses (61) of the second oscillator. Then the function of variation of the second oscillator period with temperature is calculated based on said three pulse count values. Then said calculated function is used to correct the frequency change of the quartz crystal oscillator due to temperature changes at any operating temperature. Therefore the temperature correction can be provided independently from any offset considerations and is not dependent on the choice of the three different temperatures.

    METHOD FOR TEMPERATURE COMPENSATION OF A TIME BASIS

    公开(公告)号:EP2132875B1

    公开(公告)日:2018-08-22

    申请号:EP08736166.3

    申请日:2008-04-11

    申请人: Microdul AG

    发明人: THOMMEN, Werner

    摘要: A method for temperature compensation of a time basis, driven by a quartz crystal oscillator, comprises a second oscillator having a linear frequency dependency on temperature. The method counts the pulses (65) of the quartz crystal oscillator for at least three different temperatures during time intervals (62, 63..) given by a predetermined number of pulses (61) of the second oscillator. Then the function of variation of the second oscillator period with temperature is calculated based on said three pulse count values. Then said calculated function is used to correct the frequency change of the quartz crystal oscillator due to temperature changes at any operating temperature. Therefore the temperature correction can be provided independently from any offset considerations and is not dependent on the choice of the three different temperatures.

    Verfahren zur Herstellung eines Halbleiterelementes auf einem Kupfersubstrat mit dazwischenliegender Isolationsschicht
    3.
    发明公开
    Verfahren zur Herstellung eines Halbleiterelementes auf einem Kupfersubstrat mit dazwischenliegender Isolationsschicht 审中-公开
    一种用于与一个中间绝缘层制造铜衬底上的半导体元件的方法

    公开(公告)号:EP2665092A1

    公开(公告)日:2013-11-20

    申请号:EP12168291.8

    申请日:2012-05-16

    申请人: Microdul AG

    IPC分类号: H01L23/373 H01L33/64

    摘要: Ein Verfahren zur Herstellung eines Halbleiterelementes (40), insbesondere von lichtemittierenden Dioden, setzt ein Kupfersubstrat (10) mit dazwischenliegender Isolationsschicht (50) ein. Dabei wird auf dem Kupfersubstrat (10) vor Aufbringen der Isolationsschicht (50) eine Sinter-Kupferschicht (60) aufgebracht.

    摘要翻译: 该方法包括在铜基板(10)上的绝缘层(50)的形成。 由氧游离的铜合金粉末和有机稀释剂的烧结铜层形成绝缘层,在氮气氛下之前铜基板的应用。 位于绝缘层上的LED(40)具有阻挡层没有达照明期间的适当温度,以便分布在圆顶(45)的光。 一个独立的claimsoft被包括的半导体元件。

    Device to detect and measure static electric charge
    4.
    发明公开
    Device to detect and measure static electric charge 有权
    Vorrichtung zur Erkennung und Messung einer statischen elektrischen Ladung

    公开(公告)号:EP2295992A1

    公开(公告)日:2011-03-16

    申请号:EP10174822.6

    申请日:2010-09-01

    申请人: Microdul AG

    IPC分类号: G01R15/16 G01R29/24

    摘要: A device (10) to detect and measure static electric charge (q) on an object (100) being positioned in a distance (r.) from an input electrode (11) of the device (10) comprises at least one MOS field transistor (20). The input electrode (11) is connected with the gate electrode (21) of the MOS-FET (20) to detect said electrical charge. The MOS-FET (20) comprises a gate oxide layer underneath the gate (21) and over the source (22) and drain (23) areas having a sufficient thickness to allow the MOS field transistor (20) to withstand several kilovolts (kV) of voltage and to avoid the loss of charges by tunnel effect due to the high potential of the gate electrode during ESD events.

    摘要翻译: 用于检测和测量与设备(10)的输入电极(11)定位的物体(100)上的静电荷(q)的装置(10)包括至少一个MOS场效应晶体管 (20)。 输入电极(11)与MOS-FET(20)的栅电极(21)连接,以检测所述电荷。 MOS-FET(20)包括在栅极(21)下方并且在源极(22)和漏极(23)之下的栅极氧化物层,其具有足够的厚度以允许MOS场效应晶体管(20)承受几千伏 )并且由于在ESD事件期间栅电极的高电位而避免隧道效应导致​​的电荷损失。

    Device for frequency trimming of a crystal oscillator
    5.
    发明公开
    Device for frequency trimming of a crystal oscillator 审中-公开
    Frequenzgleichstimmungsgerätfüreinen Kristalloszillator

    公开(公告)号:EP1793488A1

    公开(公告)日:2007-06-06

    申请号:EP05405677.5

    申请日:2005-11-30

    申请人: Microdul AG

    IPC分类号: H03B5/04 H03B5/36 H03L1/02

    摘要: A device for frequency trimming of a crystal oscillator comprising a crystal oscillator, at least one capacitor (C S2 ) to provide the necessary phase shift and an amplifier provided to maintain oscillation. A divider (305) connected with the crystal oscillator driven by the oscillator frequency signal (f OSC ) generates a divided oscillator frequency signal (f OSC /n). A modulator (303) connected with the output of the divider (305) produces a modulated signal (F MOD ) based on said divided oscillator frequency signal (f OSC /n). An additional switchable load capacitor (C MOD ) is capable of being switched in parallel with said at least one capacitor (C S2 ) or in parallel with the crystal oscillator using said modulated signal (F MOD ) to control said switched load capacitor. This device achieves a simple solution for accurate jitter free trimming of a crystal oscillator, which can be readily integrated and used for various frequency control schemes, e.g. temperature compensation.

    摘要翻译: 一种用于晶体振荡器的频率修整的装置,包括晶体振荡器,至少一个用于提供所需相移的电容器(C S2)和用于保持振荡的放大器。 与由振荡器频率信号(f OSC)驱动的晶体振荡器连接的分频器(305)产生分频振荡器频率信号(f OSC / n)。 与分频器(305)的输出端连接的调制器(303)基于所述分频振荡器频率信号(f OSC / n)产生调制信号(F MOD)。 附加的可切换负载电容器(C MOD)能够使用所述调制信号(F MOD)与所述至少一个电容器(C S2)并联并联,以控制所述开关负载电容器。 该器件实现了一种简单的解决方案,可以精确地实现晶体振荡器的无抖动修整,可以很容易地集成并用于各种频率控制方案,例如, 温度补偿。

    ELECTRONIC CIRCUIT FOR CONTROLLING THE OPERATION OF A WATCH
    7.
    发明公开
    ELECTRONIC CIRCUIT FOR CONTROLLING THE OPERATION OF A WATCH 审中-公开
    控制手表操作的电子电路

    公开(公告)号:EP3256912A1

    公开(公告)日:2017-12-20

    申请号:EP16704623.4

    申请日:2016-02-15

    申请人: Microdul AG

    IPC分类号: G04G19/12

    CPC分类号: G04C10/00 G04G19/12

    摘要: An electronic watch circuit for controlling the operation of a watch having analogue hands comprises an integrated circuit, which contains data values to be transmitted to registers and transmitted to peripheral members of the watch, a quartz crystal providing the clock base frequency to the integrated circuit and a connecting device arranged for enabling the peripheral member controllers, the quartz crystal, and the processor to communicate data relating to the operation of the watch to each other. The electronic circuit further comprises a microcontroller including a processor connected to a programmable memory. The integrated circuit comprises an interface, the microcontroller comprises a further interface, and the microcontroller is connected with the integrated circuit by the interfaces allowing bidirectional exchange of data between the microcontroller and the integrated circuit.

    Method to provide a protective layer on an integrated circuit and integrated circuit fabricated according to said method
    9.
    发明公开
    Method to provide a protective layer on an integrated circuit and integrated circuit fabricated according to said method 审中-公开
    提供在集成电路的保护层的方法和集成电路,其是根据该方法制造

    公开(公告)号:EP2290684A1

    公开(公告)日:2011-03-02

    申请号:EP09169154.3

    申请日:2009-09-01

    申请人: Microdul AG

    摘要: A method to provide at least one protective, especially a light-shielding, layer (2) on an integrated circuit (10) applies the protective metal layer (2) as an additional layer to the integrated circuit (10) after completion of the integrated circuit manufacturing step. This allows for an at least partly shielded integrated circuit comprising a protective layer (2,4), wherein the metallic shielding layer (2) and the overlying polyimide layer (4) are patterned with a different, coarser resolution than the other IC metal interconnection layers.

    摘要翻译: (2)作为附加的层,以在集成电路(10)的集成完成之后的方法,(2)上的集成电路提供至少一个保护性的,爱尤其遮光,层(10)适用于保护金属层 电路的制造步骤。 这允许用于在至少部分地屏蔽集成电路,包括一个保护层(2.4),所述worin金属屏蔽层(2)和上覆的聚酰亚胺层(4)与比其它IC金属互连不同的,粗糙的分辨率图案化 层。