摘要:
A system for testing chips uses a patterned tape having a patterned array of cantilevered contact leads. The tape serves as an interface between the chip under test and a testing unit by providing conductive leads from the I/O terminals on the chip to an off-chip measuring system. The leads on the array may have balls, tips or other shapes on the end to provide contact with the terminals and compensate for height differences. The tape is a single frame or has a series of arrays each positioned around an opening where the chip will be located when a particular pattern is positioned over that chip for test. The pattern on the tape may be the same array or a different array. The tape is indexed to a new pattern when the old one is damaged or no longer needed. Alignment with the chip is by optical sensing and physical pin movement. The tape may have a flap protruding into an aperture and deflectable to provide for planar contact of the leads to the device under test.
摘要:
The invention provides a capacitor having increased capacitance comprising one or more main vertical trenches (16) and one or more lateral trenches (18) extending off the main vertical trench. The capacitor has alternating first and second regions (12, 14), preferably silicon and non-silicon regions (for example, alternating silicon and germanium or alternating silicon and carbon regions). The etch characteristics of the alternating regions are utilized to selectively etch lateral trenches thereby increasing the surface area and capacitance of the capacitor. A method of fabricating the capacitors is also provided.