公开(公告)号：EP4116975B1

公开(公告)日：2024-08-28

申请号：EP22182469.1

申请日：2022-07-01

IPC分类号： G11C7/04 ,  G11C8/08 ,  G11C11/412 ,  G11C11/418 ,  G11C7/10

CPC分类号： G11C7/1006 ,  G11C8/08 ,  G11C11/418 ,  G11C11/4125 ,  G11C7/04

公开(公告)号：EP4309176A1

公开(公告)日：2024-01-24

申请号：EP22713222.2

申请日：2022-03-10

申请人： QUALCOMM INCORPORATED

发明人： MIRHAJ, Seyed Arash ,  SRIVASTAVA, Ankit ,  WADHWA, Sameer ,  LI, Ren ,  MOHAN, Suren

IPC分类号： G11C11/54 ,  G06N3/063 ,  G11C7/10 ,  G11C11/412 ,  G11C11/418 ,  G11C11/419

公开(公告)号：EP3460798B1

公开(公告)日：2022-02-23

申请号：EP18203202.9

申请日：2008-05-31

发明人： CHEN, Zhiqin ,  JUNG, Chang Ho

IPC分类号： G11C11/418 ,  G11C11/419 ,  G11C7/22

公开(公告)号：EP3329599B1

公开(公告)日：2022-02-16

申请号：EP16831255.1

申请日：2016-07-26

发明人： HUFFMAN, David, A.

IPC分类号： G11C8/10 ,  G11C11/418 ,  H03B5/36 ,  H03M5/04 ,  H01P1/20 ,  H03B5/12 ,  H03B5/32

公开(公告)号：EP3422350B1

公开(公告)日：2022-01-05

申请号：EP16891609.6

申请日：2016-11-14

发明人： ISHII, Yuichiro ,  TANAKA, Shinji

IPC分类号： G11C11/418 ,  G11C8/08 ,  G11C8/14 ,  G11C11/419 ,  G11C11/413 ,  G11C5/06 ,  G11C5/14 ,  H01L27/11 ,  G11C7/02

公开(公告)号：EP3405954B1

公开(公告)日：2019-12-11

申请号：EP16825951.3

申请日：2016-12-16

申请人： Qualcomm Incorporated

发明人： GUPTA, Sharad Kumar ,  NARASIMHAN, Mukund ,  BODA, Veerabhadra Rao

IPC分类号： G11C11/418 ,  G11C11/419 ,  G11C7/22 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18

公开(公告)号：EP3437098A1

公开(公告)日：2019-02-06

申请号：EP17709316.8

申请日：2017-02-24

申请人： Qualcomm Incorporated

发明人： SAHU, Rahul ,  GUPTA, Sharad Kumar

IPC分类号： G11C8/08 ,  G11C11/413 ,  G11C11/418

CPC分类号： G11C11/419 ,  G11C8/08 ,  G11C11/412 ,  G11C11/413 ,  G11C11/418 ,  G11C16/08 ,  G11C16/30

摘要： A memory and a method for operating a memory are provided. The memory includes a memory cell having a transistor and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the wordline to compensate for a parameter of the transistor. The method includes asserting a wordline voltage to access a memory cell having a transistor and adjusting the wordline voltage to compensate for a parameter of the transistor. Another memory is provided. The memory includes a memory cell and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the wordline based on a feedback of the wordline.

公开(公告)号：EP3262644A2

公开(公告)日：2018-01-03

申请号：EP16704773.7

申请日：2016-02-02

申请人： Qualcomm Incorporated

发明人： NGUYEN, Hoan, Huu ,  ATALLAH, Francois, Ibrahim ,  BOWMAN, Keith, Alan ,  HANSQUINE, David, Joseph Winston ,  JEONG, Jihoon

IPC分类号： G11C7/06 ,  G11C7/08 ,  G11C11/412 ,  G11C11/419 ,  G11C11/418

CPC分类号： G11C11/419 ,  G11C7/065 ,  G11C7/08 ,  G11C11/412 ,  G11C11/418

摘要： P-type Field-effect Transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells (“bit cells”) are disclosed. Related methods and systems are also disclosed. Sense amplifiers are provided in a memory system to sense bit line voltage(s) of the bit cells for reading the data stored in the bit cells. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type Field-effect Transistor (NFET) drive current due for like-dimensioned FETs. In this regard, in one aspect, PFET-based sense amplifiers are provided in a memory system to increase memory read times to the bit cells, and thus improve memory read performance.

公开(公告)号：EP2756501A1

公开(公告)日：2014-07-23

申请号：EP12766529.7

申请日：2012-09-12

申请人： Qualcomm Incorporated

发明人： GARG, Manish ,  PHAN, Michael ThaiThanh ,  HOFF, David Paul ,  NGUYEN, Quan

IPC分类号： G11C11/419 ,  G11C8/08 ,  G11C11/418

CPC分类号： G11C11/419 ,  G11C8/08 ,  G11C11/418

摘要： Embodiments of the invention are directed to systems and methods for adaptively boosting the supply voltage to an SRAM (Static Random Access Memory) in response to process-voltage-temperature variations when needed. Embodiments include a critical path that simulates a typical memory cell and read-out circuit in the SRAM. Applying a trigger signal to a word-line input port of the critical path, and comparing the output of the critical path to a reference-latch signal, provides an indication of when to boost the supply voltage to the read-out circuits of the SRAM.

公开(公告)号：EP0974978B1

公开(公告)日：2007-06-27

申请号：EP99304189.6

申请日：1999-05-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Noh, Yong-Hwan

IPC分类号： G11C8/00 ,  G11C7/00 ,  G11C11/418 ,  G11C11/419

CPC分类号： G11C7/1039 ,  G11C7/1072 ,  G11C8/00 ,  G11C11/418 ,  G11C11/419