公开(公告)号：EP2238621A1

公开(公告)日：2010-10-13

申请号：EP09707039.5

申请日：2009-01-27

申请人： NXP B.V.

发明人： SURDEANU, Radu ,  NGUYEN HOANG, Viet ,  BATAILLOU, Benoit

IPC分类号： H01L25/16 ,  H01L33/00 ,  H01L31/147

CPC分类号： H01L25/167 ,  H01L31/105 ,  H01L31/153 ,  H01L33/486 ,  H01L2224/16225 ,  H01L2924/0002 ,  H05B33/0803 ,  H05B33/0866 ,  H01L2924/00

摘要： A lighting unit comprises a packaging substrate (10) formed from a semiconductor, a channel (12) formed in the substrate and a discrete light emitting diode arrangement (34) in the channel. A surface region of the channel comprises doped semiconductor layers (20,24) which define a light sensor. The arrangement provides a light sensor (which can be used to determine colour and/or outputflux) for a LED unit, with the light sensor embedded in substrate used for packaging. This provides a low cost integration process and provides good registration between the light sensor and the LED output.

公开(公告)号：EP2082481B1

公开(公告)日：2010-05-05

申请号：EP07826663.2

申请日：2007-10-05

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet ,  GRAVESTEIJN, Dirk ,  SURDEANU, Radu

IPC分类号： H03H3/007 ,  H03H9/24

CPC分类号： H03H9/2405 ,  H03H3/0072 ,  H03H2009/02496

公开(公告)号：EP2038928A2

公开(公告)日：2009-03-25

申请号：EP07825819.1

申请日：2007-06-15

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet

IPC分类号： H01L23/528

CPC分类号： H01L23/5283 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： The invention relates to a semiconductor device comprising a substrate (1) and at least one interconnect layer located at a surface of the substrate (1), the interconnect layer comprising a first wire (20') and a second wire (20') which are located in the interconnect layer, the first wire (20') having a first thickness (T1) and the second wire (20') having a second thickness (T2) that is different from the first thickness, the thickness (T1,T2) being defined in a direction perpendicular to said surface. The invention further relates to a method of manufacturing a semiconductor device comprising a substrate (1) and an interconnect layer located at a surface of the substrate (1), the interconnect layer comprising a first wire (20') and a second wire (20') which are located in the interconnect layer.

公开(公告)号：EP2313810B1

公开(公告)日：2017-09-13

申请号：EP09786723.8

申请日：2009-07-27

申请人： NXP B.V.

发明人： BATAILLOU, Benoit ,  SURDEANU, Radu ,  BANCKEN, Pascal ,  STEENWINCKEL, David, van ,  NGUYEN HOANG, Viet

IPC分类号： G02F1/23 ,  G02F1/19

CPC分类号： G02F1/19 ,  G02F1/0147 ,  G02F1/23 ,  G02F2203/10 ,  G09G2300/00

公开(公告)号：EP2269223B1

公开(公告)日：2013-03-13

申请号：EP09731934.7

申请日：2009-04-14

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet ,  SURDEANU, Radu ,  BATAILLOU, Benoit

IPC分类号： H01L21/311

CPC分类号： H01L27/14685 ,  H01L21/31053 ,  H01L21/31111 ,  H01L27/14621 ,  H01L27/14629

公开(公告)号：EP2272304A2

公开(公告)日：2011-01-12

申请号：EP09719995.4

申请日：2009-03-09

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet ,  SURDEANU, Radu ,  BATAILLOU, Benoit

IPC分类号： H05B33/10 ,  H01L33/00

CPC分类号： H05B33/10 ,  Y10T428/24298 ,  Y10T428/24331

摘要： The present invention relates to a luminescent component (30) and a manufacturing method thereof. The luminescent component (30) comprises a first transparent carrier (18), a second transparent carrier (24), a substrate (10) sandwiched between said transparent carriers (18; 24), the substrate (10) comprising a conduit from the first transparent layer (18) to the second transparent carrier (24), the conduit being filled with a luminescent solution (20). This facilitates the use of colloidal solutions of quantum dots in such a luminescent component (30). Preferably, the substrate (10) is direct bonded to the transparent carriers (18, 24) using direct wafer bonding techniques.

公开(公告)号：EP2245904A2

公开(公告)日：2010-11-03

申请号：EP09706157.6

申请日：2009-01-27

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet ,  SURDEANU, Radu ,  BANCKEN, Pascal ,  BATAILLOU, Benoit ,  VAN STEENWINCKEL, David

IPC分类号： H05B33/08

CPC分类号： H05B33/0818 ,  G01K7/01 ,  H05B33/0866 ,  H05B33/089

摘要： A method of estimating the junction temperature of a light emitting diode comprises driving a forward bias current through the diode, the current comprising a square wave which toggles between high and low current values (Ihigh, llow), the high current value (lhigh) comprising an LED operation current, and the low current value (ILOW) comprising a non-zero measurement current. The forward bias voltage drop (Vf) is sampled and the forward bias voltage drop (Vflow) is determined at the measurement current (ILOW)-The temperature is derived from the determined forward bias voltage drop.

公开(公告)号：EP2095416A1

公开(公告)日：2009-09-02

申请号：EP07849394.7

申请日：2007-12-10

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet ,  BENNEBROEK, Martinus T.

IPC分类号： H01L21/768 ,  H01L21/3065 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L21/3083 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： The invention relates to a method of manufacturing openings in a substrate (5), the method comprising steps of: providing the substrate (5) with a masking layer (40) on a surface thereof; forming a first opening (10), a second opening (30), and a channel (20) in between the first opening (10) and the second opening (30) in the masking layer (40), the channel (20) connecting the first opening (10) with the second opening (30), the second opening (30) having an area (A2) that is larger than the area (Al) of the first opening (10); forming trenches (11, 21, 31) in the substrate (5) located at the first opening (10), the second opening (30), and at the channel (20) under masking of the masking layer (40) by means of anisotropic dry etching, and sealing off the trench (21) located at the channel (20) for forming the openings in the substrate (5). The method of the invention enables formation of a deeper first opening (10) than what is possible with the known methods. The invention further relates to a method of manufacturing a via in a substrate (5), which may be advantageously used in 3-dimensional integrated circuits.

公开(公告)号：EP2038922A2

公开(公告)日：2009-03-25

申请号：EP07825816.7

申请日：2007-06-15

申请人： NXP B.V.

发明人： NGUYEN HOANG, Viet ,  CHRISTIE, Phillip ,  MICHELON, Julien, M., M.

IPC分类号： H01L21/76

CPC分类号： H01L21/7684 ,  H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a semiconductor device manufactured in a process technology, the semiconductor device having at least one wire located in an interconnect layer of said semiconductor device, the at least one wire having a wire width (W) and a wire thickness (T), the wire width (W) being equal to a minimum feature size of the interconnect layer as defined by said process technology, wherein the minimum feature size is smaller than or equal to 0.32 μm, wherein the aspect ratio (AR) of the at least one wire is smaller than 1.5, the aspect ratio (AR) being defined as the wire thickness (T) divided by the wire width (W). The invention further discloses a method of manufacturing such a semiconductor device.