公开(公告)号：EP1984947B1

公开(公告)日：2018-12-05

申请号：EP07763302.2

申请日：2007-01-26

申请人： Micron Technology, Inc.

发明人： AKRAM, Salman ,  HIATT, William, Mark ,  OLIVER, Steve ,  WOOD, Alan, G. ,  RIGG, Sidney, B. ,  WARK, James, M. ,  KIRBY, Kyle, K.

IPC分类号： H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2924/09701

摘要： Methods for forming conductive vias include forming one or more via holes in a substrate. The via holes may be formed with a single mask, with protective layers, bond pads, or other features of the substrate acting as hard masks in the event that a photomask is removed during etching processes. The via holes may be configured to facilitate adhesion of a dielectric coating that includes a low-K dielectric material to the surfaces thereof. A barrier layer may be formed over surfaces of each via hole. A base layer, which may comprise a seed material, may be formed to facilitate the subsequent, selective deposition of conductive material over the surfaces of the via hole. The resulting semiconductor devices, intermediate structures, and assemblies and electronic devices that include the semiconductor devices that result from these methods are also disclosed.

公开(公告)号：EP2530707B1

公开(公告)日：2018-11-14

申请号：EP12003853.4

申请日：2012-05-16

申请人： IXYS Semiconductor GmbH

发明人： Knoll, Heiko, Dipl.-Ing.

IPC分类号： H01L21/48 ,  H01L23/14 ,  H01L23/373 ,  C04B37/02

CPC分类号： C04B37/021 ,  C04B37/026 ,  C04B2235/656 ,  C04B2235/665 ,  C04B2235/96 ,  C04B2237/121 ,  C04B2237/125 ,  C04B2237/126 ,  C04B2237/128 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/368 ,  C04B2237/402 ,  C04B2237/403 ,  C04B2237/407 ,  C04B2237/704 ,  C04B2237/706 ,  C04B2237/708 ,  C04B2237/72 ,  C04B2237/86 ,  H01L21/4846 ,  H01L23/147 ,  H01L23/3735 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

公开(公告)号：EP2057681B1

公开(公告)日：2018-11-07

申请号：EP07817575.9

申请日：2007-09-25

申请人： OSRAM Opto Semiconductors GmbH

发明人： SORG, Jörg Erich ,  GRUBER, Stefan ,  HERRMANN, Siegfried ,  HAHN, Berthold

IPC分类号： H01L25/075 ,  H01L33/00 ,  H01L23/00 ,  H01L33/62 ,  H01L33/50

CPC分类号： H01L25/0753 ,  H01L24/24 ,  H01L24/82 ,  H01L33/0079 ,  H01L33/508 ,  H01L33/62 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/48091 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/00014 ,  H01L2924/00

公开(公告)号：EP3381510A1

公开(公告)日：2018-10-03

申请号：EP18164307.3

申请日：2018-03-27

申请人： Greatbatch Ltd.

发明人： SEITZ, Keith W. ,  TANG, Xiaohong ,  THIEBOLT, William C. ,  CALAMEL, Jonathan ,  SHI, Thomas ,  MARZANO, Thomas

IPC分类号： A61N1/375

CPC分类号： A61N1/3754 ,  C03C8/14 ,  C04B2237/343 ,  C04B2237/348 ,  C04B2237/361 ,  C04B2237/363 ,  C04B2237/365 ,  C04B2237/403 ,  C04B2237/408 ,  H01L23/10 ,  H01L23/15 ,  H01L24/26 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/0047 ,  H05K5/0095

摘要： Electrically conductive and hermetic vias are disposed within a flexible insulator substrate of a feedthrough assembly to provide miniaturization of feedthrough assemblies inasmuch as the feedthrough components are capable of supporting very small and hermetic conductively filled via holes in the absence of additional components, such as, for example, terminal pins, leadwires, and the like.

公开(公告)号：EP2380237B1

公开(公告)日：2018-07-18

申请号：EP09837046.3

申请日：2009-12-23

申请人： Intel Corporation

发明人： CHOUDHURY, Debabani ,  RUBERTO, Mark

IPC分类号： H01Q21/00 ,  H01Q21/06 ,  H01Q23/00 ,  H01Q1/52 ,  H01L23/498 ,  H01L23/552 ,  H01L23/66

CPC分类号： H01Q21/0025 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01Q1/523 ,  H01Q21/062 ,  H01Q21/065 ,  H01Q21/067 ,  H01L2224/05599

摘要： Disclosed are integration approaches for mm-wave array type architectures using multilayer substrate technologies. For instance, an apparatus may include a first substrate layer, a second substrate layer, and a third substrate layer. The first substrate layer has a first plurality of array elements, and the second substrate layer has a second plurality of array elements. The third substrate layer has an integrated circuit to exchange one or more radio frequency (RF) signals with the first and second pluralities of array elements. The first and second substrate layers are separated by approximately a half wavelength (lambda/2) corresponding to the one or more RF signals.

公开(公告)号：EP3297036A1

公开(公告)日：2018-03-21

申请号：EP17200330.3

申请日：2010-09-24

申请人： MSG Lithoglas GmbH

发明人： HANSEN, Dr. Ulli ,  LEIB, Dr. Jürgen ,  MAUS, Simon

IPC分类号： H01L31/0203 ,  H01L33/48 ,  H01L33/00 ,  H01L31/0232 ,  H01L33/58 ,  H01L33/60 ,  H01L23/00 ,  H01L33/52 ,  H01L31/02

CPC分类号： H01L31/0232 ,  H01L24/97 ,  H01L31/02005 ,  H01L31/0203 ,  H01L33/005 ,  H01L33/48 ,  H01L33/483 ,  H01L33/52 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01068 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/1815 ,  Y10T29/49002 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49169 ,  H01L2924/00014

摘要： Die Erfindung bezieht sich auf ein Verfahren zum Herstellen einer Anordnung mit einem Bauelement (23) auf einem Trägersubstrat (20), wobei das Verfahren die folgenden Schritte umfasst: Herstellen von Abstandselementen (1) auf der Rückseite eines Decksubstrats (3), wobei in einem Substrat (4) Vertiefungen (5) auf einer Seite angebracht werden, auf dieser Seite das Decksubstrat angeordnent wird, so dass ein Vertiefungshohlraum entsteht und das Substrat von der gegenüberliegenden Seite rückgedünnt wird, so dass dieser Hohlraum geöffnet wird, womit getrennte Abstandselemente (1) entstehen, Anordnen eines Bauelementes (22) auf einer Deckfläche eines Trägersubstrates (20) und Anordnen der an dem Decksubstrat (3) gebildeten Abstandselemente (1) auf dem Trägersubstrat (20), derart, dass das Bauelement (22) in dem wenigstens einen Hohlraum (23) angeordnet und dieser geschlossen wird. Des Weiteren bezieht sich die Erfindung auf eine Anordnung und ein Verfahren zum Herstellen eines Halbzeugs für eine Bauelementanordnung.

摘要翻译： 本发明涉及一种方法，用于与载体衬底（20）上的装置（23）产生的布置中，所述方法包括以下步骤：在盖基板（3）的背面制备隔离件（1），其中，在 基板（4）具有凹陷（5）被安装在一侧，所述盖基板在这个页面上angeordnent，使得槽空腔形成，并从相反一侧的基板是rückgedünnt使得该腔被打开，由此，单独的间隔元件（1） 形成间隔物形成，在载体衬底（20）的顶表面上放置的部件（22）和在（3）（1）在载体衬底上（20），使得在组件（22），所述覆盖基板的至少一个空腔布置 （23）排列并且这是封闭的。 此外，本发明涉及用于生产用于部件布置的半成品的布置和方法。

公开(公告)号：EP2040291B1

公开(公告)日：2018-03-14

申请号：EP08164325.6

申请日：2008-09-15

申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

发明人： Fendler, Manuel ,  Ait-Mani, Abdenacer ,  Gueugnot, Alain ,  Marion, François

IPC分类号： H01L21/58 ,  H01L27/146 ,  H01L21/78 ,  H01L21/683 ,  H01L31/024 ,  H01L23/34

CPC分类号： H01L21/6835 ,  H01L21/78 ,  H01L24/83 ,  H01L24/97 ,  H01L27/1469 ,  H01L2221/68354 ,  H01L2221/68377 ,  H01L2224/32014 ,  H01L2224/83191 ,  H01L2224/95001 ,  H01L2224/95136 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01052 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/16195 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2924/00

公开(公告)号：EP2673402B1

公开(公告)日：2017-08-16

申请号：EP12706092.9

申请日：2012-02-07

申请人： Cambridge Nanolitic Limited ,  Cambridge Nanotherm Limited

发明人： SHASHKOV, Pavel ,  KHOMUTOV, Gennady ,  YEROKHIN, Aleksey ,  USOV, Sergey

IPC分类号： C25D5/18 ,  C25D11/00 ,  C25D11/02 ,  C25D11/04 ,  C25D11/26 ,  C25D11/30 ,  C25D11/32 ,  C25D13/02 ,  C25D21/12 ,  C25D11/06 ,  H01L23/14 ,  H01L23/367 ,  H01L23/373 ,  H05K1/05

CPC分类号： C25D5/18 ,  C25D11/00 ,  C25D11/005 ,  C25D11/02 ,  C25D11/024 ,  C25D11/026 ,  C25D11/04 ,  C25D11/06 ,  C25D11/26 ,  C25D11/30 ,  C25D11/32 ,  C25D13/02 ,  C25D15/00 ,  C25D21/12 ,  H01L23/142 ,  H01L23/3677 ,  H01L23/3735 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H05K1/021 ,  H05K1/053 ,  H05K1/115 ,  H05K1/18 ,  H05K2201/0116 ,  H05K2203/0315 ,  H05K2203/1147 ,  Y10T428/1317 ,  Y10T428/24917 ,  Y10T428/249969 ,  H01L2924/00

公开(公告)号：EP3163602A3

公开(公告)日：2017-08-09

申请号：EP16002297.6

申请日：2010-01-20

申请人： Nichia Corporation

发明人： Kuramoto, Masafumi ,  Ogawa, Satoru ,  Niwa, Miki

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L33/40 ,  H01L33/48 ,  H01L33/62 ,  H01S5/022

CPC分类号： H01L33/44 ,  H01L23/08 ,  H01L23/293 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/2712 ,  H01L2224/2745 ,  H01L2224/275 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83055 ,  H01L2224/83075 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83207 ,  H01L2224/83439 ,  H01L2224/83487 ,  H01L2224/8383 ,  H01L2224/8384 ,  H01L2224/83894 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2224/83907 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01064 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0541 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/201 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/3025 ,  H01L2933/0066 ,  H01S5/0226 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48 ,  H01L2224/05599

摘要： An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. Disclosed is a method for producing a semiconductor device in which silver (520, 620, 720) formed by silver sputtering, silver vapour deposition or silver plating and provided on a surface of a base (500, 600, 700) and silver (140, 240, 340) formed by silver sputtering, silver vapour deposition or silver plating and provided on a surface of a semiconductor element (100, 200, 300) are bonded, the method comprising the steps of arranging the semiconductor element (100, 200, 300) on the base (500, 600, 700) such that said silver (140, 240, 340) provided on a surface of the semiconductor element (100, 200, 300) is in contact with said silver (520, 620, 720) provided on a surface of the base (500, 600, 700), temporarily bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying a pressure or an ultrasonic vibration to the semiconductor element (100, 200, 300) or the base (500, 600, 700), and permanently bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying heat having a temperature of 150 to 900°C to the semiconductor element (100, 200, 300) and the base (500, 600, 700) in air or in an oxygen environment. The step of temporarily bonding and the step of permanently bonding may be performed simultaneously. The semiconductor element (100, 200, 300) and the base (500, 600, 700) may be heated in advance at 150 to 900°C before the step of temporarily bonding. A pressure of 5 to 50 MPa may be applied before the step of temporarily bonding. The semiconductor element (100, 200, 300) may be a light emitting semiconductor element.

摘要翻译： 本发明的目的是提供一种制造具有低电阻的导电构件的方法，并且使用不含粘合剂的低成本稳定导电材料组合物获得导电构件。 本发明公开了一种用于制造半导体器件的方法，其中通过银溅射，银气相沉积或镀银形成并设置在基底（500,600,700）和银（140,160）的表面上的银（520,620,720） （100,200,300）的表面上通过银溅射，银气相沉积或镀银形成的半导体元件（100,200,300）的方法包括以下步骤：将半导体元件（100,200,300） ）设置在所述基座（500,600,700）上，使得设置在所述半导体元件（100,200,300）的表面上的所述银（140,240,340）与所述银（520,620,720）接触， 设置在所述基座（500,600,700）的表面上，通过对所述半导体元件（500,600,700）施加压力或超声波振动来暂时接合所述半导体元件（100,200,300）和所述基座（500,600,700） （100,200,300）或所述基座（500,600,700）之间，并且永久地将所述半导体元件（100,200,300）和所述半导体元件 通过在空气中或在氧气环境中向半导体元件（100,200,300）和基座（500,600,700）施加具有150至900℃的温度的热量，从而在基座（500,600,700）上形成基座（500,600,700）。 暂时键合的步骤和永久键合的步骤可以同时进行。 在临时键合步骤之前，半导体元件（100,200,300）和基座（500,600,700）可预先在150至900℃加热。 临时粘合步骤之前可施加5至50MPa的压力。 半导体元件（100,200,300）可以是发光半导体元件。

公开(公告)号：EP3151268A3

公开(公告)日：2017-08-09

申请号：EP16002295.0

申请日：2010-01-20

申请人： Nichia Corporation

发明人： Kuramoto, Masafumi ,  Ogawa, Satoru ,  Niwa, Miki

IPC分类号： H01L21/58 ,  H01L21/60 ,  H01L33/40 ,  H01L33/48 ,  H01L33/62 ,  H01S5/022

CPC分类号： H01L33/44 ,  H01L23/08 ,  H01L23/293 ,  H01L23/49579 ,  H01L23/49582 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/83 ,  H01L33/62 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/2712 ,  H01L2224/2745 ,  H01L2224/275 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83055 ,  H01L2224/83075 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83207 ,  H01L2224/83439 ,  H01L2224/83487 ,  H01L2224/8383 ,  H01L2224/8384 ,  H01L2224/83894 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2224/83907 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01064 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/0541 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/201 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/3025 ,  H01L2933/0066 ,  H01S5/0226 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48 ,  H01L2224/05599

摘要： An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. Disclosed is a method for producing a semiconductor device in which silver or silver oxide (520, 620, 720) provided on a surface of a base (500, 600, 700) and silver oxide (140, 240, 340) provided on a surface of a semiconductor element (100, 200, 300) are bonded, the method including the steps of arranging a semiconductor element (100, 200, 300) on a base (500, 600, 700) such that silver oxide (140, 240, 340) provided on a surface of the semiconductor element (100, 200, 300) is in contact with silver or silver oxide (520, 620, 720) provided on a surface of the base (500, 600, 700), temporarily bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying a pressure or an ultrasonic vibration to the semiconductor element (100, 200, 300) or the base (500, 600, 700), and permanently bonding the semiconductor element (100, 200, 300) and the base (500, 600, 700) by applying heat having a temperature of 150 to 900°C to the semiconductor element (100, 200, 300) and the base (500, 600, 700). The step of temporarily bonding and the step of permanently bonding may be performed simultaneously. The step of permanently bonding may be performed in air or in an oxygen environment, or in a nitrogen environment. The semiconductor element (100, 200, 300) and the base (500, 600, 700) may be heated in advance at 150 to 900°C before the step of temporarily bonding. A pressure of 5 to 50 MPa may be applied before the step of temporarily bonding. The semiconductor element (100, 200, 300) may be a light emitting semiconductor element.

摘要翻译： 本发明的目的是提供一种制造具有低电阻的导电构件的方法，并且使用不含粘合剂的低成本稳定导电材料组合物获得导电构件。 公开了一种用于制造半导体器件的方法，其中在基体（500,600,700）的表面上提供的银或氧化银（520,620,720）和在表面上提供的氧化银（140,240,340） 的半导体元件（100,200,300）接合，所述方法包括以下步骤：在基座（500,600,700）上布置半导体元件（100,200,300），使得氧化银（140,240,340） 设置在半导体元件（100,200,300）的表面上的银或氧化银（520,620,720）与设置在基部（500,600,700）的表面上的银或氧化银（520,620,720）接触， 通过对所述半导体元件（100,200,300）或所述基座（500,600,700）施加压力或超声波振动来对所述半导体元件（100,200,300）和所述基座（500,600,700）进行加热，以及 通过向半导体元件（100,200,300）施加温度为150至900℃的热量来永久地结合半导体元件（100,200,300）和基座（500,600,700） 和底座（500,600,700）。 暂时键合的步骤和永久键合的步骤可以同时进行。 永久结合的步骤可以在空气中或氧气环境中或在氮气环境中进行。 在临时键合步骤之前，半导体元件（100,200,300）和基座（500,600,700）可预先在150至900℃加热。 临时粘合步骤之前可施加5至50MPa的压力。 半导体元件（100,200,300）可以是发光半导体元件。