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11.发明公开Chopper type differential amplifier using MOS gate capacitors 失效Chopper-Differenzverstärkermit MOS-Kondensatoren。
公开(公告)号：EP0638996A1
公开(公告)日：1995-02-15
申请号：EP94112234.3
申请日：1994-08-04
申请人： NEC CORPORATION
摘要： The chopper type differential amplifier according to this invention includes a differential amplifier having a first input end and a second input end, a first input terminal supplied with a first input signal, a second input terminal supplied with a second input signal, a first MOS gate capacitor having its gate electrode connected to the first input end of the differential amplifier and its lower electrode connected to the first input terminla, a second MOS gate capacitor having its gate electrode connected to the second input end of the differential amplifier and its lower electrode connected to the second input terminla, and a precharging circuit which supplies a precharging voltage to the gate electrode of the first MOS gate capacitor and the gate electrode of the second MOS gate capacitor during the precharging period, wherein the precharging voltage is a voltage which is all the time higher than the voltages of the first input signal and the second input signal.
摘要翻译： 根据本发明的斩波型差分放大器包括具有第一输入端和第二输入端的差分放大器，提供有第一输入信号的第一输入端，提供有第二输入信号的第二输入端，第一MOS栅 电容器，其栅电极连接到差分放大器的第一输入端，其下电极连接到第一输入端，第二MOS栅极电容器，其栅电极连接到差分放大器的第二输入端，其下电极连接 以及预充电电路，其在预充电期间向第一MOS栅极电容器的栅电极和第二MOS栅极电容器的栅电极提供预充电电压，其中，预充电电压为全电压 该时间高于第一输入信号和第二输入信号的电压。
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公开(公告)号：EP3920414A1
公开(公告)日：2021-12-08
申请号：EP21177476.5
申请日：2021-06-02
申请人： Analog Devices, Inc.
发明人： KUSUDA, Yoshinori
摘要： Chopper amplifiers with tracking of multiple input offsets are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected along a signal path. The amplification circuit includes two or more pairs of input transistors, from which a control circuit chooses a selected pair of input transistors to amplify an input signal. The chopper amplifier further incudes an offset correction circuit that senses the signal path to generate an input offset compensation signal for the amplification circuit. Furthermore, the offset correction circuit separately tracks an input offset of each of the two or more pairs of input transistors.
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公开(公告)号：EP3244532A1
公开(公告)日：2017-11-15
申请号：EP16169019.3
申请日：2016-05-10
发明人： FRICK, Vincent , OSBERGER, Laurent
CPC分类号： H03F3/45183 , G01R33/0029 , G01R33/0088 , H03F3/393 , H03F3/45475 , H03F3/45659 , H03F9/00 , H03F15/00 , H03F2200/129 , H03F2200/372 , H03F2200/375 , H03F2200/411 , H03F2200/75 , H03F2203/45082 , H03F2203/45088 , H03F2203/45116 , H03F2203/45134 , H03F2203/45138 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45226 , H03F2203/45276 , H03F2203/45346 , H03F2203/45361 , H03F2203/45434 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45681 , H03F2203/45684
摘要： According to an aspect of the invention, it is provided a magnetic operational amplifier having a differential stage (1) comprising a first magnetic field effect transistor MAGFET (11) and a differential signal conditioner, the differential signal conditioner comprising a charge stage (151), a differential input pair (153) connected to the charge stage (151) and a biasing current source (155) connected to the differential input pair (153); the magnetic field effect transistor MAGFET (11) being connected to the charge stage (151) as a second differential input pair and the differential signal conditioner comprising a second biasing current source (156) connected to the magnetic field effect transistor MAGFET (11).
摘要翻译： 根据本发明的一个方面，提供了一种具有包括第一磁场效应晶体管MAGFET（11）和差分信号调节器的差分级（1）的磁运算放大器，差分信号调节器包括充电级（151） ，连接到所述充电级（151）的差分输入对（153）和连接到所述差分输入对（153）的偏置电流源（155）; 所述磁场效应晶体管MAGFET（11）连接到所述充电级（151）作为第二差分输入对，并且所述差分信号调节器包括连接到所述磁场效应晶体管MAGFET（11）的第二偏置电流源（156）。
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15.发明公开AN ACTIVE ELECTRODE HAVING A CLOSED-LOOP UNIT-GAIN AMPLIFIER WITH CHOPPER MODULATION 审中-公开具有CHOPPER调制的闭环单元 - 增益放大器的有源电极
公开(公告)号：EP3232922A1
公开(公告)日：2017-10-25
申请号：EP14816246.4
申请日：2014-12-19
申请人： T&W Engineering A/S
发明人： KIDMOSE, Preben , ZHOU, Xiong , KILSGAARD, Soren , LI, Qiang
IPC分类号： A61B5/0408 , H03F3/393 , A61B5/0428 , A61B5/0448 , H03F3/45
CPC分类号： A61B5/0478 , A61B5/04004 , A61B5/0408 , A61B5/6803 , A61B5/6817 , A61B2562/0209 , H03F1/26 , H03F1/523 , H03F3/393 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F2200/261 , H03F2200/271 , H03F2203/45306 , H03G3/20 , H04R25/353 , H04R25/505 , H04R2225/43 , H04R2225/67
摘要： An active electrode has an electrode for sensing an electric potential and generating an input signal, and a shield placed near the electrode but being electric insulated from the electrode. An integrated amplifier (10) has an input connected to the at least one electrode for receiving the input signal, and providing a buffered path outputting a buffered output signal. The shield being connected to the output of the integrated amplifier to actively drive the electrical potential of the shield, thereby providing an active shielding of the electrode. The buffered path includes a first mixer (11) in front of the integrated amplifier for frequency shifting the input signal from a basic frequency range to a higher frequency range, and a second mixer (12) on the output of the integrated amplifier for frequency shifting the amplified signal from the higher frequency range back to the basic frequency range. The active electrode may be used for recording EEG signals.
摘要翻译： 有源电极具有用于感测电势并产生输入信号的电极，以及放置在所述电极附近但与电极电绝缘的屏蔽件。 集成放大器（10）具有连接到至少一个电极的输入端，用于接收输入信号，并提供输出缓冲输出信号的缓冲路径。 该屏蔽连接到集成放大器的所述输出以主动地驱动所述屏蔽的电势，由此提供对所述电极的有源屏蔽。 缓冲路径包括在集成放大器前面的第一混频器（11），用于将输入信号从基本频率范围频移到较高频率范围，以及第二混频器（12）在集成放大器的输出上用于频移 来自所述较高频率范围的放大信号回到所述基本频率范围。 有源电极可用于记录EEG信号。
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公开(公告)号：EP2797230A2
公开(公告)日：2014-10-29
申请号：EP14164784.2
申请日：2014-04-15
申请人： Ricoh Company, Ltd.
发明人： Nagashisa, Takeshi
CPC分类号： H03F3/185 , H03F3/393 , H03F3/45995 , H03F2200/271 , H03F2200/333
摘要： A chopper amplifier includes a chopper modulator to modulate a certain detection signal and a bias voltage by a certain control signal and output a chopper modulation signal, a first differential amplifier to differentially amplify the chopper modulation signal from the chopper modulator and output a differential modulation signal, a chopper demodulator to demodulate the differential modulation signal from the first differential amplifier by the control signal and output a demodulation signal, a second differential amplifier to extract a detection signal component from the demodulation signal, and a plurality of filters connected at an input terminal of the second differential amplifier and having different cutoff frequencies from each other relative to the demodulation signal.
摘要翻译： 斩波放大器包括：斩波调制器，用于通过一定的控制信号调制一定的检测信号和偏置电压，并输出斩波调制信号;第一差分放大器，对来自斩波调制器的斩波调制信号进行差分放大，并输出差分调制信号 斩波解调器，通过控制信号解调来自第一差分放大器的差分调制信号，并输出解调信号;第二差分放大器，从解调信号提取检测信号分量;以及多个滤波器，连接在输入端 的第二差分放大器，并且相对于解调信号具有彼此不同的截止频率。
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公开(公告)号：EP2320295A1
公开(公告)日：2011-05-11
申请号：EP10189487.1
申请日：2010-10-29
CPC分类号： G05F3/30 , H03F3/347 , H03F3/45183 , H03F2203/45466
摘要： A bandgap voltage reference circuit ( 100 ) for generating a bandgap voltage reference ( Vbg ). Said circuit comprises a current generator ( 104 ) controlled by a first driving voltage ( Vpgate ) for generating a first current ( Iptat ) depending on the driving voltage, and a first reference circuit element ( 102 ) coupled to the controlled current generator ( 104 ) for receiving the first current and generating a first reference voltage ( Vpluse ) in response to the first current. The circuit further comprises a second reference circuit element ( 106 ) for receiving a second current ( Iptat ) corresponding to the first current; said second reference circuit element is adapted to generate a second reference voltage ( Vminuse ) in response to the second current. Said circuit further comprises a third reference circuit element ( 128 ) for receiving a third current ( Iptat ) corresponding to the first current and generating the bandgap reference voltage in response to the third current, and an operational amplifier ( 124 ). The operational amplifier has a first input terminal coupled to the first circuit element for receiving a first reference voltage input ( Vplus ) based on the first reference voltage, a second input terminal coupled to the second reference circuit element for receive a second input voltage ( Vminus ) based on the second reference voltage and an output terminal coupled to the controlled current generator to provide the first driving voltage ( Vpgate ) to the current generator according to the difference between the first input voltage and the second input voltage. The circuit also comprises a control circuit ( 134 ) comprising first capacitive means ( 136 ) and second capacitive means ( 138 ). The first capacitive means have a first terminal coupled to the first reference circuit element to receive the first reference voltage and a second terminal coupled to the first input terminal to provide the first input voltage. The second capacitive means comprise a first terminal coupled to the second reference circuit element for receiving the second reference voltage and a second terminal coupled to the second input terminal to provide the second input voltage. The control circuit also comprises biasing means ( 140 ) to selectively provide a common-mode voltage ( Vcm ) to the second terminals of the first and second capacitive means.
摘要翻译： 一种用于产生带隙电压基准（Vbg）的带隙电压参考电路（100）。 所述电路包括由第一驱动电压（Vpgate）控制的电流发生器（104），用于根据驱动电压产生第一电流（Iptat），以及耦合到受控电流发生器（104）的第一参考电路元件（102） 用于接收第一电流并响应于第一电流产生第一参考电压（Vpluse）。 电路还包括用于接收对应于第一电流的第二电流（Iptat）的第二参考电路元件（106） 所述第二参考电路元件适于响应于第二电流产生第二参考电压（Vminuse）。 所述电路还包括第三参考电路元件（128），用于接收对应于第一电流的第三电流（Iptat）并响应于第三电流产生带隙参考电压，以及运算放大器（124）。 运算放大器具有耦合到第一电路元件的第一输入端，用于基于第一参考电压接收第一参考电压输入（Vplus）;耦合到第二参考电路元件的第二输入端，用于接收第二输入电压（Vminus ）和耦合到受控电流发生器的输出端子，以根据第一输入电压和第二输入电压之间的差异向电流发生器提供第一驱动电压（Vpgate）。 电路还包括包括第一电容装置（136）和第二电容装置（138）的控制电路（134）。 第一电容装置具有耦合到第一参考电路元件以接收第一参考电压的第一端子和耦合到第一输入端子以提供第一输入电压的第二端子。 第二电容装置包括耦合到第二参考电路元件用于接收第二参考电压的第一端子和耦合到第二输入端子以提供第二输入电压的第二端子。 控制电路还包括偏置装置（140），以选择性地向第一和第二电容装置的第二端子提供共模电压（Vcm）。
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公开(公告)号：EP0564490A4
公开(公告)日：1996-12-18
申请号：EP92900966
申请日：1991-11-08
发明人： HOWATT JOHN R
CPC分类号： H03F1/0277 , H03F3/217 , H03F2200/432
摘要： A switching amplifier system which in one embodiment includes switching circuitry (25) responsive to a tri-state command signal for providing a power output from a power supply (27) which has amplitude levels, time durations, and polarities corresponding to the tri-state command signal for supply to a load (19) via a suitable filter (18). A further embodiment includes a linear amplifier (53), the switching circuitry responding to a fourth state command signal for actuating the linear amplifier to respond directly to an input signal when the amplitude of the input signal is below a selected level.
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公开(公告)号：EP0410295A3
公开(公告)日：1991-10-23
申请号：EP90113802.4
申请日：1990-07-19
申请人： MOTOROLA, INC.
发明人： Mijuskovic, Dejan
IPC分类号： H03F3/393
CPC分类号： H03F1/303 , H03F3/45192 , H03F3/45775 , H03F2200/81
摘要： A single-ended operational amplifier uses a plurality of chopper circuits (9, 16, 24) to alternately transpose matched transistor pairs for cancelling offset errors due to transistor mismatches from statistical process variations. The differential input signals are transposed while simultaneously transposing the currents in a current mirror (14, 15) and in the load devices (37). The matched devices comprising an output stage (36) remain untransposed since their contribution to offset error is minimal but their contribution to noise error would be substantial due to the potentially larger voltage differentials existing between them.
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公开(公告)号：EP0048513A2
公开(公告)日：1982-03-31
申请号：EP81201006.4
申请日：1981-09-10
CPC分类号： H03F3/393
摘要： A switchable analogue signal inverter suitable for inverting an input D.C. voltage as required, for example inverting the D.C. voltage from a digital to analogue converter (DAC) and thereby halving the size of the DAC.
Essentially the inverter comprises a capacitor (C) having one side alternately switchable between a reference voltage point and an output terminal (30) and another side alternately switchable between the reference voltage point and an input signal terminal (18) and switching means (S1, S2) for selectively reversing the phasing of the switching between the reference voltage and the input signal.
In one embodiment the inverter comprises a double pole reversing switch (51, S2) having inputs (20 to 23) connected to a signal input terminal (18) and to a reference voltage point (ground) and a capacitor (C) connected by a change-over switch (S3) to first and second outputs of the reversing switch (S1, S2) and by another change-over switch (S4) to a signal output terminal (30) or to the reference voltage point. The reversing switch is operable in response to a polarity change signal (24) to reverse the signal applied to the first and second outputs and thereby determine the polarity of the voltage pumped by the capacitor (C) to the output terminal (30) by clocking the change-over switches (S3 S4). The switches may be implemented by field effect transistors
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