PHOTONIC BASED CROSS-CORRELATION HOMODYNE DETECTION WITH LOW PHASE NOISE
    21.
    发明公开
    PHOTONIC BASED CROSS-CORRELATION HOMODYNE DETECTION WITH LOW PHASE NOISE 审中-公开
    光子相位不良噪声互相关零差

    公开(公告)号:EP2220794A2

    公开(公告)日:2010-08-25

    申请号:EP08850317.2

    申请日:2008-11-13

    申请人: Oewaves, Inc.

    IPC分类号: H04B10/02 H04B10/13

    摘要: In one aspect, this document provides an implementation of a system for characterizing an oscillator. This system includes an input port that receives an oscillation signal from an oscillator under test; an input port signal splitter that splits the received oscillation signal into a first oscillation signal and a second oscillation signal; a first photonic signal processing branch circuit that processes the first oscillation signal to produce a first branch output signal; a second photonic signal processing branch circuit that processes the second oscillation signal to produce a second branch output signal; a dual channel signal analyzer that receives the first and second branch output signals to measure noise in the received oscillation signal; and a computer controller that controls the first and second photonic signal processing branch circuits and the dual channel signal analyzer to control measurements of the noise in the received oscillation signal.

    METHOD AND DEVICE FOR TESTING A PHASE LOCKED LOOP
    22.
    发明公开
    METHOD AND DEVICE FOR TESTING A PHASE LOCKED LOOP 审中-公开
    方法和设备用于测试锁相环

    公开(公告)号:EP1716423A1

    公开(公告)日:2006-11-02

    申请号:EP05702798.9

    申请日:2005-01-27

    摘要: Testing device for testing a phase locked loop having a power supply input, said testing device comprising: a power supply unit for providing a power supply signal VDD having a variation profile to the power supply input of the phase locked loop, wherein a width and height of said variation profile are formed in such a way, that the voltage controlled oscillator is prevented from outputting an oscillating output signal U,,„ t a means for disabling a feedback signal to a phase comparator of the phase locked loop such that said phase locked loop is operated in an open loop mode, and a meter for measuring a measurement signal of the phase locked loop, while said power supply signal is provided to the power supply input.

    Clock signal supply
    24.
    发明公开
    Clock signal supply 审中-公开
    Taktsignalversorgung

    公开(公告)号:EP1119103A1

    公开(公告)日:2001-07-25

    申请号:EP00300386.0

    申请日:2000-01-19

    IPC分类号: H03K5/19 G01R31/28

    摘要: A clock signal monitor is described having a detector (24-34) responsive to a radio frequency input clock signal to provide a detected signal representative of the amplitude of the input signal. A threshold detector (36, 38, 40) detects whether or not the detected signal represents an amplitude below a threshold. A sounder (42) gives an alarm indication if amplitude below the threshold is detected.
    If the laboratory reference clock signal becomes weak or fails the alarm indication is given. Equipment's internal reference clock signal generator is generally sufficiently accurate that if incorrectly configured equipment is connected to the laboratory supply, resulting in amplitude modulation of the signal, the beat frequency would normally be around 1Hz. An intermittent alarm indication is thus given at the same frequency as the amplitude of the modulated signal falls below the threshold.

    摘要翻译: 描述了具有响应于射频输入时钟信号的检测器(24-34)以提供表示输入信号的幅度的检测信号的时钟信号监视器。 阈值检测器(36,38,40)检测检测到的信号是否表示低于阈值的幅度。 如果检测到低于阈值的振幅,发声器(42)发出报警指示。 如果实验室参考时钟信号变弱或失败,则报警指示。 设备的内部参考时钟信号发生器通常足够精确,如果配置不正确的设备连接到实验室电源,导致信号的幅度调制,则拍频通常在1Hz附近。 因此,以与调制信号的幅度下降到阈值以下相同的频率给出间歇报警指示。