公开(公告)号：EP2985785B1

公开(公告)日：2023-12-20

申请号：EP13881860.4

申请日：2013-10-15

Inventor： YOSHIDA, Kazuo ,  NEGISHI, Masato

IPC: H01L21/60 ,  H01L21/78 ,  H01L23/488

公开(公告)号：EP3136428B1

公开(公告)日：2023-12-13

申请号：EP16156430.7

申请日：2016-02-19

Inventor： ORY, Olivier

IPC: H01L21/60 ,  H01L23/485 ,  H01L21/78 ,  H01L21/306

公开(公告)号：EP4285405A1

公开(公告)日：2023-12-06

申请号：EP22706342.7

申请日：2022-01-25

Applicant: Aledia

Inventor： CAICEDO, Nohora ,  MAYER, Frédéric

IPC: H01L21/683 ,  H01L21/60 ,  H01L33/00 ,  H01L25/075

公开(公告)号：EP4280273A1

公开(公告)日：2023-11-22

申请号：EP22305748.0

申请日：2022-05-19

Applicant: Mitsubishi Electric R&D Centre Europe B.V. ,  Mitsubishi Electric Corporation

Inventor： PICHON, Pierre-Yves

IPC: H01L23/485 ,  H01L23/31 ,  H01L21/60

Abstract: The present disclosure relates to a semiconductor chip, having an aluminium layer, wherein said aluminium layer has a structuration of at least a portion of a surface receiving an additional deposition (Cu), and wherein said structuration forms peaks on said portion of surface occupying between 20 and 80% of said portion of surface.

公开(公告)号：EP3086362B1

公开(公告)日：2023-11-22

申请号：EP15866377.3

申请日：2015-06-05

Inventor： ODA, Daizo ,  ETO, Motoki ,  YAMADA, Takashi ,  HAIBARA, Teruo ,  OISHI, Ryo ,  UNO, Tomohiro ,  OYAMADA, Tetsuya

IPC: H01L23/49 ,  C22C9/00 ,  C22F1/08 ,  H01L23/00 ,  H01L21/60

公开(公告)号：EP4276899A1

公开(公告)日：2023-11-15

申请号：EP22173259.7

申请日：2022-05-13

Applicant: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

Inventor： Stahr, Johannes ,  Leitgeb, Markus ,  Mokkapati, Venkata Raghavendra Subrahmanya Sarma

IPC: H01L23/485 ,  H01L23/498 ,  H01L21/60

Abstract: A package (100) which comprises an integrated circuit substrate (102) having an exposed substrate pad (104) and having an exposed substrate dielectric (106), and an electronic component (108) having an integrated circuit (136), having an exposed component pad (110) and having an exposed component dielectric (112), wherein the integrated circuit substrate (102) is connected with the electronic component (108) so that there is a direct physical contact between the substrate pad (104) and the component pad (110) and so that there is a direct physical contact between the substrate dielectric (106) and the component dielectric (112).

公开(公告)号：EP4276889A1

公开(公告)日：2023-11-15

申请号：EP23172009.5

申请日：2023-05-08

Applicant: STMicroelectronics S.r.l.

Inventor： GOTTARDI, Thomas ,  MODARELLI, Nicoletta ,  CATALANO, Guendalina

IPC: H01L21/60 ,  H01L23/492 ,  H01L23/495

Abstract: A semiconductor die (14) is attached on a die-attachment portion (12A) of a planar substrate (12) and a planar electrically conductive clip (16) in mounted onto the semiconductor die (14). The electrically conductive clip (16) has a distal portion (16A) extending away from the semiconductor die (14) with the semiconductor die (14) sandwiched between the substrate (12) and the at least one electrically conductive clip (16). The substrate (12) includes electrically conductive leads (12B) arranged facing the distal portion (16A) of the electrically conductive clip (16) with a gap (G) formed therebetween.
The gap (G) is filled with a mass of gap-filling material (20) transferred to the gap (G) via Laser Induced Forward Transfer, LIFT processing, the mass (20) sized and dimensioned to fill the gap (G).

公开(公告)号：EP4258326A1

公开(公告)日：2023-10-11

申请号：EP23166493.9

申请日：2023-04-04

Applicant: NXP B.V.

Inventor： Mao, Kuan-Hsiang ,  Chuang, Wen Yuan ,  Huang, Wen Hung

IPC: H01L21/56 ,  H01L23/495 ,  H01L25/16 ,  H01L23/31 ,  H01L21/60

Abstract: Five-side mold protection for semiconductor packages is described. In an illustrative, non-limiting embodiment, a semiconductor package may include: a substrate (403) comprising a top surface, a bottom surface, and four sidewalls; an electrical component (407) comprising a backside and a frontside, where the frontside of the electrical component is coupled to the top surface of the substrate; and a molding compound (411), where the molding compound encapsulates the backside of the electrical component and the four sidewalls of the substrate.

公开(公告)号：EP2669937B1

公开(公告)日：2023-10-11

申请号：EP12739744.6

申请日：2012-01-16

Inventor： HATTA, Takeshi ,  MASUDA, Akihiro

IPC: C25D5/02 ,  C25D5/10 ,  C25D5/50 ,  H01L21/48 ,  H01L21/60 ,  C22C13/00 ,  H01L23/485 ,  H05K3/34 ,  C25D7/12

公开(公告)号：EP4252274A1

公开(公告)日：2023-10-04

申请号：EP21798381.6

申请日：2021-10-22

Applicant: MB Automation GmbH & Co. KG

Inventor： HOLZNER, Benjamin ,  AUGUST, Uwe Franz

IPC: H01L21/67 ,  H01L21/60