PARTIAL BLOCK DATA PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY
    41.
    发明公开
    PARTIAL BLOCK DATA PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY 审中-公开
    EILEMNICHTFLÜCHTIGENSPEICHER中的TEILBLOCKDATENPROGRAMMIER- UND LESEOPERATIONEN

    公开(公告)号:EP2953030A1

    公开(公告)日:2015-12-09

    申请号:EP15166112.1

    申请日:2002-01-07

    发明人: Conley, Kevin M.

    IPC分类号: G06F12/02

    摘要: Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into superceded pages of data, the pages of new data are identified by the same logical address as the pages of data which they superceded and a time stamp is added to note when each page was written. When reading the data, the most recent pages of data are used and the older superceded pages of data are ignored. This technique is also applied to metablocks that include one block from each of several different units of a memory array, by directing all page updates to a single unused block in one of the units.

    摘要翻译: 通过对相同或另一个块的未使用页面中的新数据进行编程来更新少于非易失性存储器块的所有页面中的数据。 为了防止不必要将不变的数据页复制到新的块中,或者将标志编程到被替代的数据页面中,新数据的页面由与它们所取代的数据页面相同的逻辑地址来标识,并且时间戳 添加每个页面写入时注意。 当读取数据时,使用最新的数据页面,并忽略旧的旧版数据页面。 通过将所有页面更新指向单个的单个未使用的块,该技术也被应用于包含来自存储器阵列的几个不同单元中的每一个的一个块的元区块。

    ELECTRONIC CONTROL DEVICE FOR VEHICLE
    44.
    发明公开
    ELECTRONIC CONTROL DEVICE FOR VEHICLE 有权
    电子控制装置用于车辆

    公开(公告)号:EP2916232A1

    公开(公告)日:2015-09-09

    申请号:EP13852259.4

    申请日:2013-10-18

    IPC分类号: G06F12/16

    摘要: [Problem] To accurately obtain learning values of control parameters even if a power on/off operation is repeated.
    [Solution] An electronic control device (1) has a flash memory (12) that stores therein learning values of control parameters. The flash memory (12) has a plurality of blocks (31) and (32). When there is no residual storage capacity to be used in the first block (31) at the time of power on, it is checked if there is a set of learning values in the block (31). When a set of learning values is prepared completely in the second block (32), new learning values are written in the next block. On the other hand, when a set of learning values is not available in the second block (32), data in the second block (32) is erased, and then new learning values are written in the second block (32).

    LOGICAL ADDRESS TRANSLATION
    50.
    发明公开
    LOGICAL ADDRESS TRANSLATION 审中-公开
    逻辑地址转换

    公开(公告)号:EP2684132A2

    公开(公告)日:2014-01-15

    申请号:EP12754482.3

    申请日:2012-03-01

    IPC分类号: G06F12/02 G06F13/14

    摘要: The present disclosure includes methods for logical address translation, methods for operating memory systems, and memory systems. One such method includes receiving a command associated with a LA, wherein the LA is in a particular range of LAs and translating the LA to a physical location in memory using an offset corresponding to a number of physical locations skipped when writing data associated with a range of LAs other than the particular range.

    摘要翻译: 本公开包括用于逻辑地址转换的方法,用于操作存储器系统的方法和存储器系统。 一种这样的方法包括:接收与LA相关联的命令,其中LA处于LA的特定范围中,并且使用与在写入与范围相关联的数据时跳过的多个物理位置相对应的偏移将LA转换为存储器中的物理位置 除特定范围外的其他权利人。