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公开(公告)号：EP3249421A2
公开(公告)日：2017-11-29
申请号：EP17171674.9
申请日：2017-05-18
发明人： OKAZAKI, Yukio , SATOU, Kazutoshi , SAITO, Noriaki
CPC分类号： H03K3/014 , G01S7/023 , G01S7/032 , G01S7/28 , G01S13/288 , G01S13/88 , G01S13/931 , G06F1/04 , G06F1/3203 , H03K3/353
摘要： A radar apparatus includes a transmitter including a plurality of circuits that intermittently transmit one or more radar signals, the plurality of circuits being suspended power supplying during a period in which the one or more radar signals are not transmitted, variation detection circuitry that detects process variations of the plurality of circuits, and determination circuitry that determines a startup timing of each of the plurality of circuits in response to the process variations and outputs startup commands in response to the determined startup timings to the plurality of circuits.
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公开(公告)号：EP2566052A2
公开(公告)日：2013-03-06
申请号：EP12193355.0
申请日：2002-10-15
IPC分类号： H03K3/014
CPC分类号： G06F1/04 , G11C7/22 , G11C7/222 , G11C11/406 , G11C11/4074 , G11C2207/2227 , G11C2211/4067 , H03K3/012 , H03K3/014 , H03K3/0315 , H03K5/1252 , H03K5/19 , H03L3/00
摘要： There is provided an oscillator circuit in which an oscillation permitting signal (EN) sets an oscillator section (5) in an oscillation-operable state, whereby a controller section (4) starts operation. The controller section (4) that has started its operation changes an oscillation-frequency control signal (VR) value corresponding to a predetermined oscillation frequency so as to set an oscillation frequency at an oscillator section (5). Further on, the oscillator section (5) outputs an oscillation signal (VOSC) in response to a detection signal (MON) that is outputted after a detector section (1) compares a signal inputted therein with a predetermined signal value and detects that the inputted signal reaches a predetermined signal value. Thereby, a transient state of an oscillation-frequency control signal (VR) can be detected. That is, there can be avoided an output of an unstable oscillation signal due to a transient oscillation-frequency control signal (VR). Such an oscillator circuit is capable of obtaining stable frequency by avoiding output having unstable frequency that is likely to occur to an operation/stop-control-feasible type oscillator circuit when oscillation begins.
摘要翻译： 提供了振荡器电路，其中振荡允许信号（EN）将振荡器部分（5）设置在振荡可操作状态，由此控制器部分（4）开始操作。 已经开始其操作的控制器部分（4）改变对应于预定振荡频率的振荡频率控制信号（VR）值，以便在振荡器部分（5）处设置振荡频率。 此外，振荡器部分（5）响应于在检测器部分（1）将输入的信号与预定信号值进行比较之后输出的检测信号（MON）输出振荡信号（VOSC），并检测输入的 信号达到预定的信号值。 由此，可以检测振荡频率控制信号（VR）的过渡状态。 也就是说，可以避免由于瞬态振荡频率控制信号（VR）引起的不稳定振荡信号的输出。 这样的振荡电路能够通过在振荡开始时避免可能发生在操作/停止控制可行型振荡器电路的频率不稳定的输出而获得稳定的频率。
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公开(公告)号：EP2562934A2
公开(公告)日：2013-02-27
申请号：EP12193350.1
申请日：2002-10-15
CPC分类号： G06F1/04 , G11C7/22 , G11C7/222 , G11C11/406 , G11C11/4074 , G11C2207/2227 , G11C2211/4067 , H03K3/012 , H03K3/014 , H03K3/0315 , H03K5/1252 , H03K5/19 , H03L3/00
摘要： There is provided an oscillator circuit in which an oscillation permitting signal (EN) sets an oscillator section (5) in an oscillation-operable state, whereby a controller section (4) starts operation. The controller section (4) that has started its operation changes an oscillation-frequency control signal (VR) value corresponding to a predetermined oscillation frequency so as to set an oscillation frequency at an oscillator section (5). Further on, the oscillator section (5) outputs an oscillation signal (VOSC) in response to a detection signal (MON) that is outputted after a detector section (1) compares a signal inputted therein with a predetermined signal value and detects that the inputted signal reaches a predetermined signal value. Thereby, a transient state of an oscillation-frequency control signal (VR) can be detected. That is, there can be avoided an output of an unstable oscillation signal due to a transient oscillation-frequency control signal (VR). Such an oscillator circuit is capable of obtaining stable frequency by avoiding output having unstable frequency that is likely to occur to an operation/stop-control-feasible type oscillator circuit when oscillation begins.
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公开(公告)号：EP1911160A1
公开(公告)日：2008-04-16
申请号：EP06732476.4
申请日：2006-04-24
发明人： KOYAMA, Jun SEMICONDUCTOR ENERGY LABORATORY COLTD , OSADA, Takeshi c/o Semiconductor Energy Lab.
CPC分类号： H03L7/0995 , H03K3/014 , H03K3/0315 , H03L7/085 , H03L7/099
摘要： A PLL circuit includes a phase detector, a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The phase detector compares a phase of a signal Fs which is input from outside with a phase of a signal Fo/N which is input from the frequency divider. The loop filter generates a signal Vin by removing alternating current components from a signal input from the phase detector. The voltage-controlled oscillator outputs a signal Fo based on the signal Vin input from the loop filter. The frequency divider converts the signal Fo output from the voltage-controlled oscillator into Fo/N (frequency division by N), and outputs it to the phase detector.
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46.发明公开Programming methodology and architecture for an analog programmable system on a chip 审中-公开编程方法和架构的芯片上的模拟programierbares系统
公开(公告)号：EP1202184A3
公开(公告)日：2004-12-29
申请号：EP01125563.5
申请日：2001-10-25
发明人： Snyder, Warren , Mar, Monte
CPC分类号： G06F1/32 , G06F1/08 , G06F15/7867 , G06G7/06 , H03B5/364 , H03H19/004 , H03K3/012 , H03K3/014 , H03K3/02315
摘要： A method of programming a programmable analog device architecture that introduces on a single chip a set of tailored analog blocks and elements that can be configured and reconfigured in different ways to implement a variety of different analog functions. The analog blocks can be electrically coupled to each other in different combinations to perform different analog functions. The architecture includes an array of analog blocks, including continuous time blocks and different types of switched capacitor blocks. Each analog block includes analog elements that have changeable characteristics that can be specified according to the function to be performed. Configuration registers define the type of function to be performed, the way in which the analog blocks are to be coupled, the inputs and outputs of the analog blocks, and the characteristics of the analog elements. The configuration registers can be dynamically programmed. Thus, the device can be used to realize a large number of different analog functions and applications.
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公开(公告)号：EP1347575A1
公开(公告)日：2003-09-24
申请号：EP02027375.1
申请日：2002-12-09
申请人： ROBERT BOSCH GMBH
IPC分类号： H03K3/03
CPC分类号： H03K3/012 , H03K3/014 , H03K3/0315
摘要： Die Erfindung betrifft ein Verfahren zur Erzeugung eines oszillierenden Signals mit folgenden Schritten:
Initialisierung einer geradzahligen Anzahl von miteinander verketteten Invertern, so dass die Ausgänge der Inverter alternierend einen ersten logischen Wert und einen zweiten logischen Wert aufweisen,
Eingabe eines Anregungs-Pulses in die Verkettung der Inverter zur Anregung der Oszillation, wobei die Länge des Anregungs-Pulses kleiner als die Laufzeit durch die Verkettung der Inverter ist.
Die Erfindung betrifft ferner einen digitalen Oszillator mit einer geradzahligen Anzahl von miteinander verketteten Invertern (6, 7, 8, 9, 10, 11, 12, 13)摘要翻译： 数字振荡器具有连接在一起的偶数个反相器（6至13）。 提供控制输入（14）用于中断链以初始化振荡器。 第一逆变器（6）可以具有将逆变器设置为初始状态的控制输入（14）。 当第一信号被施加到控制输入时，与第一反相器的输入端（15）存在的逻辑值无关，第一反相器的输出端（16）取第一逻辑值。 还包括独立权利要求：（1）具有数字振荡器的电子电路; （2）产生振荡单极化的方法。
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公开(公告)号：EP1102391B1
公开(公告)日：2003-06-04
申请号：EP00123957.3
申请日：2000-11-03
发明人： Fujii, Yoichi , Endo, Takashi
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公开(公告)号：EP1220107A2
公开(公告)日：2002-07-03
申请号：EP01125550.2
申请日：2001-10-25
发明人： Snyder, Warren
IPC分类号： G06F15/78
CPC分类号： G06F1/32 , G06F1/08 , G06F15/7867 , H03B5/364 , H03K3/012 , H03K3/014 , H03K3/02315
摘要： A new digital configurable macro architecture is described. The digital configurable macro architecture is well suited for microcontroller or controller designs. In particular, the foundation of the digital configurable macro architecture is a programmable digital circuit block. In an embodiment, programmable digital circuit blocks are 8-bit circuit modules that can be programmed to perform any one of a variety of predetermined digital functions by changing the contents of a few registers therein, unlike a FPGA which is a generic device that can be programmed to perform any arbitrary digital function. Specifically, the circuit components of the programmable digital circuit block are designed for reuse in several of the predetermined digital functions such that to minimize the size of the programmable digital circuit block.
摘要翻译： 描述了一种新的数字可配置宏架构。 数字可配置宏架构非常适合微控制器或控制器设计。 特别地，数字可配置宏架构的基础是可编程数字电路块。 在一个实施例中，可编程数字电路块是8位电路模块，其可以被编程为通过改变其中的几个寄存器的内容来执行各种预定数字功能中的任何一个，这不同于作为通用设备的FPGA 被编程为执行任意数字功能。 具体地，可编程数字电路块的电路部件被设计为在若干预定的数字功能中重新使用，以使可编程数字电路块的尺寸最小化。
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公开(公告)号：EP0889589A3
公开(公告)日：2001-01-31
申请号：EP98301197.4
申请日：1998-02-18
申请人： FUJITSU LIMITED
发明人： Ozawa, Naoki, c/o Fujitsu Limited , Tani, Hiroaki, c/o Fujitsu LSI Technology Limited , Nomura, Kenichi c/o Fujitsu LSI Technology Limited
IPC分类号： H03K3/03
CPC分类号： H03K3/0315 , H03K3/014
摘要： A voltage controlled oscillation circuit with an oscillation frequency thereof controlled in accordance with an external voltage is disclosed. An odd number of inversion circuit elements (1-1 to 1-(2n+1)) such as inverters for inverting output signals thereof with respect to input signals thereto are connected in series with each other. An output side of the last-stage one of the odd number of the inversion circuit elements (1-1 to 1-(2n+1)) is connected to an input side of the first-stage one of the inversion circuit elements (1-1 to 1-(2n+1)) to thereby cause an oscillation. A plurality of oscillation frequency variable control units (2-1 to 2-(2n+1)) such as variable resistor circuit elements for changing an oscillation frequency in accordance with an external voltage are each inserted between each set of adjacent inversion circuit elements. A plurality of fixed resistor circuit elements (3-1 to 3-(2n+1)) each having a fixed resistance value are connected in parallel with a plurality of the oscillation frequency variable control units (2-1 to 2-(2n+1)), respectively. The functions of both the variable resistor circuit elements and the fixed resistor circuit elements can be carried out at the same time by the use of a depletion type transistor or a transistor of a short channel type.
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