Direct-digital synthesizers
    51.
    发明公开
    Direct-digital synthesizers 审中-公开
    Direkter digitaler Synthetisierer

    公开(公告)号:EP1037379A2

    公开(公告)日:2000-09-20

    申请号:EP00301410.7

    申请日:2000-02-23

    CPC classification number: H03B28/00 G06F1/0328 G06F1/0342

    Abstract: A direct-digital synthesizer (20) for generating a waveform includes a digital accumulator (22) fed by a phase increment word (X) and a series of clock pulses (CK) for successively adding the phase increment word (X) to produce a series of N bit phase words (Y). A table or trigonometric engine (24) produces sine and cosine digital signals related to the M most significant bits of the phase word (Y) produced by the accumulator (22). A feedback loop (30) is fed by truncation error words (T(Z)) comprising at least a portion of N-M least significant bits (32) of the N bit phase words (Y) producing truncation error compensation words. The feedback loop (30) includes a digital filter (34) and provides a low pass truncation error response to the truncation error having at least one zero in the transfer function thereof at DC. The truncation error response has a transfer function comprising the term (1-az -1 ) where: z is the discrete time frequency variable and a is a unity or non-unity weighting factor. One such filter (34, Fig. 4A) includes an adder (Ao) fed by the truncation error words and a storage device (D) fed by the clock pulses (CK) and by the truncation error words for producing at an output thereof the truncation error words delayed by each one of the clock pulses (CK) fed thereto. The adder (Ao) is fed by the output of the storage device (D) to produce an algebraic sum of the truncation error words fed to the adder (Ao) and the delayed truncation error words.

    Abstract translation: 用于产生波形的直接数字合成器(20)包括由相位增量字(X)和一系列时钟脉冲(CK)馈送的数字累加器(22),用于连续添加相位增量字(X)以产生 系列N位相位字(Y)。 表或三角引擎(24)产生与由累加器(22)产生的相位字(Y)的M个最高有效位相关的正弦和余弦数字信号。 产生截断误差补偿字的N位相位字(Y)的N-M个最低有效位(32)的至少一部分的截断误差字(T(Z))馈送反馈回路30。 反馈回路(30)包括数字滤波器(34),并且在DC的传递函数中具有至少一个零的截断误差提供低通截断误差响应。 截断误差响应具有包括项(1-az <-1>)的传递函数,其中:z是离散时间频率变量,a是单位或非单位加权因子。 一个这样的滤波器(图4A中的34)包括由截断误差字馈送的加法器(Ao)和由时钟脉冲(CK)馈送的存储装置(D)和用于在其输出端产生的截断误差字, 截断错误字被馈送到其中的每个时钟脉冲(CK)延迟。 加法器(Ao)由存储装置(D)的输出馈送,以产生馈送到加法器(Ao)的截断误差字和延迟的截断误差字的代数和。

    DIGITAL FREQUENCY GENERATOR
    52.
    发明授权
    DIGITAL FREQUENCY GENERATOR 失效
    数字频率发生器

    公开(公告)号:EP0870359B1

    公开(公告)日:2000-03-29

    申请号:EP96943255.8

    申请日:1996-12-27

    CPC classification number: A61M5/172 H02P8/14 H03B28/00

    Abstract: In a method of generating a clock signal having a desired frequency, a pulse is generated each time a stored accumulator value ( tank ) is found to be greater than or equal to a stored ( trigger ) value. In a first loop (10), the stored accumulator value ( tank ) is iteratively incremented by a first iterative value ( r ) until the stored accumulator value is greater than or equal to the stored trigger value and subsequently in a second loop (11) the stored accumulator value ( tank ) is decremented by a second iterative value until the stored accumulator value is less than the stored trigger value. During each iteration of the first loop (10), a current frequency of the clock signal is compared to a desired frequency value and if the two values are different, the first iterative value ( r ) is corrected at a predetermined rate ( accRate ) over one of more subsequent iterations until the frequency of the generator clock signal corresponds to the detected value of the desired frequency. In a preferred example, the number of iterations needed to change the first iterative value ( r ) is determined by a stored accumulator value which is added to an accelerator-accumulator ( AccTank ) for each iteration that the first iterative value and the desired frequency are not exactly equal.

    APPARATUS AND METHOD FOR FREQUENCY TRANSLATION IN A COMMUNICATION DEVICE.
    53.
    发明公开
    APPARATUS AND METHOD FOR FREQUENCY TRANSLATION IN A COMMUNICATION DEVICE. 失效
    执行率的装置和方法在通信设备中。

    公开(公告)号:EP0656161A4

    公开(公告)日:1995-11-02

    申请号:EP94920674

    申请日:1994-05-16

    Applicant: MOTOROLA INC

    Abstract: A digital-to-analog (D/A) convertor (206) multiplies an input signal by a sinewave approximation (300) to perform frequency translation. Optimized coefficient values are predetermined and are programmed based on a control word generated during a clock cycle. The programming over a time period representative of the frequency of the sinewave approximation (300) provides a signal that multiplies an input signal such that the effects of odd harmonics at an output are mitigated while the advantages of a traditional switching mixer are retained. In one embodiment the multiplying D/A convertor (206) includes a plurality of resistors (R1-R8) connected to an amplifier (400), with plural switching gates (G1-G8) switching select resistors (R1-R8) in and out of operation, a control word from counter/controller (203) controlling the gates (G1-G8).

    RINGING SIGNAL GENERATOR
    54.
    发明授权
    RINGING SIGNAL GENERATOR 失效
    环形信号发生器

    公开(公告)号:EP0144344B1

    公开(公告)日:1991-01-23

    申请号:EP84901706.6

    申请日:1984-04-11

    Applicant: AT&T Corp.

    Abstract: A ringing signal generator in which a low-level reference ringing signal, generated by a reference waveform generator (101), is amplified by a delta-modulation power amplifier (106, 108). The low-level reference signal is digitally encoded using delta-modulation techniques to generate a high-level digital signal. The high-level digital signal is filtered (421) to remove the high-frequency components therefrom and to decode the digital signal to form the high-level ringing signal that has the same shape and frequency as the reference signal. The delta-modulation power amplifier generates the ringing signal by comparing (401) the reference ringing signal (Ei) with an analog feedback signal (Ef) reconstructed from the high-level digital signal. The resultant binary error signal (E$(1,4)$), representing the polarity of the difference between the reference and the feedback signals, is applied to a logic circuit (405) which samples the error signal at a clock rate substantially higher than the frequency of the ringing signal, and generates two binary control signals (+SW, -SW) based upon the error signal at multiple clock instants. These control signals open and close the switching elements (411, 412, 413, 414) in a bridge switch (410) to generate the high-level digital signal.

    Driver circuit
    55.
    发明公开
    Driver circuit 失效
    驱动电路

    公开(公告)号:EP0186073A3

    公开(公告)日:1988-08-03

    申请号:EP85115945

    申请日:1985-12-13

    Applicant: HONEYWELL INC.

    CPC classification number: H03B28/00

    Abstract: A driver circuit for applying a first signal having a desired wave form, frequency and peak to peak voltage to a coaxial transmission line which also has applied to it a second signal having a substantially higher frequency includes an operational amplifier (26) having the first signal applied to its noninverting input (24). The output (28) of the operational amplifier is applied across the primary winding (34) of a driver coupling transformer (36) through an inductor (30) which provides high impedance to the second signal. The voltages induced in the secondary winding (38) of the driver transformer are applied to the transmission line (40). The primary winding (46) of a feedback transformer (48) is connected in parallel with the secondary winding (38) of the driver transformer. The voltage induced in the secondary winding of the feedback transformer (48) is applied by a feedback circuit (52, 54) including an R.C. filter (56, 58) to the inverting input (44) of the operational amplifier (26). The signal applied to the inverting input terminal includes both an A.C. component and a D.C. component, which components cause the output current of the operational amplifier to induce in the secondary winding of the driver transformer a signal, the wave form, frequency and peak to peak voltage of which substantially equal those of the first signal applied to the noninverting input (24) of the operational amplifier.

    ULTRASONIC SCALPEL, ENERGY INSTRUMENT FOR SURGERY, AND POWER ADJUSTMENT METHOD THEREFOR

    公开(公告)号:EP4403120A1

    公开(公告)日:2024-07-24

    申请号:EP22882687.1

    申请日:2022-10-11

    Abstract: An ultrasonic scalpel, an energy instrument for surgery, and a power adjustment method therefor. The ultrasonic scalpel comprises a hand-held part, a control module (16), an ultrasonic generator (122), and an ultrasonic cutter head, and further comprises the following modules: a load detection module, which is configured to detect the load conditions of the ultrasonic cutter head, the load detection module being electrically connected to an input end of the control module (16); a power conversion module, an input side thereof being electrically connected to an output end of the control module (16), and an output side thereof being electrically connected to the ultrasonic generator (122); the control module (16) is configured to receive a detection signal from the load detection module, and when an activation button is pressed, the control module (16) controls the power conversion module to adjust the output power of the ultrasonic generator (122). The ultrasonic scalpel, according to its own load conditions, automatically adjusts the output power of the ultrasonic generator (122); without affecting the operation effect, unnecessary amplitude of the cutter head is reduced in a no-load state, the service life of the scalpel is extended, and the single use cost of the ultrasonic scalpel is reduced.

    TERAHERTZ FERROELECTRIC RESONATOR
    58.
    发明公开

    公开(公告)号:EP4054074A1

    公开(公告)日:2022-09-07

    申请号:EP21160551.4

    申请日:2021-03-03

    Abstract: The disclosure relates to a method of employing a device with a heterostructure as a resonator for electrons of an electrical circuit or for a terahertz electromagnetic wave. The heterostructure comprises at least one dielectric layer and at least one ferroelectric layer. The at least one ferroelectric layer comprises a plurality of ferroelectric polarization domains. The plurality of ferroelectric polarization domains forms a polarization pattern. The polarization pattern is adapted to perform an oscillation with a resonance frequency in a terahertz frequency range. The method comprises functionally coupling the oscillation of the polarization pattern and an oscillation of the electrons of the electrical circuit or of the terahertz electromagnetic wave by the device.

    Oscillator and electronic device
    60.
    发明公开
    Oscillator and electronic device 有权
    Oszillator und elektronische Vorrichtung

    公开(公告)号:EP2908554A1

    公开(公告)日:2015-08-19

    申请号:EP15155345.0

    申请日:2012-03-08

    CPC classification number: H03B28/00 H04R17/00 H04R2217/03 H04R2499/11

    Abstract: Provided is an oscillator (100) including a piezoelectric body (70) that has a plurality of protrusions (72) on one surface thereof, a plurality of electrodes (80) that are respectively provided on the plurality of protrusions (72) so as to be separated from each other, and a plurality of electrodes (82) that are provided on the other surface opposite to the one surface of the piezoelectric body (70) so that each of the electrodes faces only one electrode (80). Thus, it is possible to prevent variation in acoustic characteristics from occurring. Therefore, the oscillator capable of improving the acoustic characteristics of an electronic device is provided.

    Abstract translation: 提供了一种振荡器(100),其包括在其一个表面上具有多个突起(72)的压电体(70),分别设置在多个突起(72)上的多个电极(80),以便 彼此分离,并且设置在与压电体(70)的一个表面相对的另一表面上,使得每个电极仅面对一个电极(80)的多个电极(82)。 因此,可以防止发生声学特性的变化。 因此,提供了能够改善电子设备的声学特性的振荡器。

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