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公开(公告)号:EP0859409B1
公开(公告)日:2011-10-12
申请号:EP98300865.7
申请日:1998-02-05
IPC分类号: H01L23/373 , H01L21/48 , C30B33/00
CPC分类号: H01L21/4871 , H01L21/4878 , H01L23/3732 , H01L2924/0002 , Y10S257/93 , H01L2924/00
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公开(公告)号:EP1111677A3
公开(公告)日:2003-10-15
申请号:EP00127971.0
申请日:2000-12-20
发明人: Imai, Makoto , Ogawa, Naoki , Yagi, Yugi , Kojima, Takashi , Yamada, Yasushi
IPC分类号: H01L25/07 , H01L25/11 , H01L23/373 , H01L23/467 , H01L23/473
CPC分类号: H01L23/3672 , H01L25/072 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2924/1305 , H01L2924/13055 , Y10S257/93 , H01L2924/00
摘要: A first electronic device (24), a second electronic device (26) which generates less heat than the first electric device (24), and an electrode are connected by a heat leveling plate (30) formed of an electrically conductive material having high thermal conductivity. A heat radiation plate (40) is provided below an insulated substrate (22) to which the first and second electronic devices (24, 26) are mounted. The second electronic device (26) is cooled by a heat radiation path which extends through the insulated substrate (22) and the heat radiation plate (40) and a heat radiation path which extends through the second electronic device (26) and the electrode to the heat radiation plate. The first and the second electronic devices (24, 26) have substantially the same temperature due to heat radiation through the heat leveling plate (30). As a result, cooling effect of the electronic devices (24, 26) can be enhanced.
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公开(公告)号:EP1329063A1
公开(公告)日:2003-07-23
申请号:EP01979633.3
申请日:2001-10-09
发明人: CARSON, John, C. , ORGUZ, Vokan, H.
CPC分类号: G06T9/004 , G06T7/20 , H04L45/583 , H04L49/101 , H04L49/15 , H04L49/1507 , H04L49/25 , H04L49/3018 , H04L49/3027 , H04L49/351 , H04L49/357 , Y10S257/93
摘要: A compact multi-stage data packet switching network (100), adapted for simultaneously routing data packets sets from input ports (110) to output ports (190) comprising: a first stack (140) of IC switching layers (113); a second stack (160) of IC switching layers (113), each IC switching layer (113) containing at least one switching element circuit (142);an interconnection (150) that connects the first stack (140) of IC switching layers (113) to the second stack of (160) of IC switching layers (113) to form the network (100), the interconnection (150) provides a natural full-mesh connection. IC superconducting and superconducting cooling are also used for providing high speed and low power operation.
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公开(公告)号:EP1187230A3
公开(公告)日:2003-03-19
申请号:EP01121085.3
申请日:2001-09-03
CPC分类号: C23C14/228 , C23C14/28 , H01L35/34 , Y10S257/93 , Y10T428/29
摘要: A thermoelectric material having large thermoelectric figure of merit is provided. A thin film comprising nanometer-sized particles having their diameters distributing within the range of 0.5 nm though 100 nm both inclusive is formed by depositing the nanometer-sized particles on a substrate, or dispersing the particles in a solid matrix material or solution thereby to form a thin film. In the thin film, a band gap due to quantum confinement effect is generated in each of the particles and electrical conduction occurs by that at least a part of the particles supply carriers. Accordingly, thermal conductivity κ as well as electrical resistivity ρ and Seebeck coefficient S all of which are factors of thermoelectric figure of merit can be independently controlled, and it is possible to get a thermoelectric material having large dimensionless thermoelectric figure of merit ZT such as beyond 1.5.
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公开(公告)号:EP1287566A1
公开(公告)日:2003-03-05
申请号:EP01923379.0
申请日:2001-04-25
申请人: Span, Gerhard
发明人: Span, Gerhard
CPC分类号: H01L35/16 , H01L35/22 , H01L35/32 , H01L2224/45144 , H01L2224/48463 , H01L2224/49107 , H01L2224/4918 , H01L2924/3025 , Y10S257/93 , H01L2924/00
摘要: The invention relates to a thermoelectric element comprising at least one n-type layer (1) and at least one p-type layer (2) of one or more doped semiconductors, whereby the n-type layer(s) (1) and the p-type layers(s) (2) are arranged to form at least one pn-type junction (3). At least one n-type layer (1) and at least one p-type layer (2) are contacted in an electrically selective manner, and a temperature gradient (T1, T2) is applied or tapped parallel (x-direction) to the boundary layer (3) between at least one n-type layer (1) and p-type layer (2). At least one pn-type junction is formed essentially along the entire, preferably longest, extension of the n-type layer(s) (1) and of the p-type layer(s) (2) and thus essentially along the entire boundary layer (3) thereof.
摘要翻译: 本发明涉及包含至少一个n型层(1)和一个或多个掺杂半导体的至少一个p型层(2)的热电元件,其中所述n型层(1)和 设置p型层(2)以形成至少一个pn型结(3)。 以电选择方式接触至少一个n型层(1)和至少一个p型层(2),并且将温度梯度(T1,T2)施加或平行地(x方向)施加到 在至少一个n型层(1)和p型层(2)之间的边界层(3)。 至少一个pn型结基本上沿着n型层(1)和p型层(2)的整个,优选最长的延伸形成,并且因此基本上沿着整个边界 层(3)。
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公开(公告)号:EP1174182A1
公开(公告)日:2002-01-23
申请号:EP00903980.1
申请日:2000-02-16
申请人: Toyo Kohan Co., Ltd.
CPC分类号: B01J19/0093 , B01J19/0046 , B01J2219/00317 , B01J2219/00495 , B01J2219/00783 , B01J2219/00873 , B01L3/5027 , B01L2300/087 , B01L2300/12 , B01L2300/1822 , B01L2400/0406 , B01L2400/0661 , C40B60/14 , G01N35/08 , G01N2035/00158 , Y10S257/93
摘要: A microchip for chemical reaction capable of rapidly performing an experiment irrespective of the types of the chemical substrates used for the experiment under various experimental conditions, wherein a horizontal communication path 13 comprising a plurality of chemical reaction pool portions 11, 12 and grooves communicating these chemical reaction pool portions 11, 12 to each other is formed in the surface of a diamond substrate 10 of minute size forming a substrate, a vertical communication path 20 comprising through-holes vertically communicating the chemical reaction pool portions 11, 12 to each other is provided in the diamond substrate 10, and an opening/closing valve 21 is installed at a communicating portion, and further heating/cooling means 23, 24 such as a Peltier device are installed at those positions corresponding to the chemical reaction pool portions 11, 12, respectively, whereby a variety of experiments can be performed in a verry small space without being restricted by the types of chemical substrates and by varrying the experimental conditions.
摘要翻译: 一种用于化学反应的微芯片,其能够快速地进行实验,而不管在各种实验条件下用于实验的化学基板的类型如何,其中包括多个化学反应池部分11,12的水平连通路径13和连通这些化学物质的槽 反应池部11,12彼此形成在形成基板的微小尺寸的金刚石基板10的表面中,设置有包括使化学反应池部11,12彼此垂直连通的通孔的垂直连通路径20 在金刚石基板10中,并且开闭阀21安装在连通部分处,并且在对应于化学反应池部分11,12的那些位置处安装诸如珀耳帖装置的另外的加热/冷却装置23,24, 从而可以在不受限制的情况下在虚拟的小空间中执行各种实验 通过化学底物的种类和不同的实验条件。
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公开(公告)号:EP1111677A2
公开(公告)日:2001-06-27
申请号:EP00127971.0
申请日:2000-12-20
发明人: Imai, Makoto , Ogawa, Naoki , Yagi, Yugi , Kojima, Takashi , Yamada, Yasushi
IPC分类号: H01L25/07
CPC分类号: H01L23/3672 , H01L25/072 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2924/1305 , H01L2924/13055 , Y10S257/93 , H01L2924/00
摘要: A first electronic device (24), a second electronic device (26) which generates less heat than the first electric device (24), and an electrode are connected by a heat leveling plate (30) formed of an electrically conductive material having high thermal conductivity. A heat radiation plate (40) is provided below an insulated substrate (22) to which the first and second electronic devices (24, 26) are mounted. The second electronic device (26) is cooled by a heat radiation path which extends through the insulated substrate (22) and the heat radiation plate (40) and a heat radiation path which extends through the second electronic device (26) and the electrode to the heat radiation plate. The first and the second electronic devices (24, 26) have substantially the same temperature due to heat radiation through the heat leveling plate (30). As a result, cooling effect of the electronic devices (24, 26) can be enhanced.
摘要翻译: 第一电子设备(24),产生比第一电气设备(24)少的热量的第二电子设备(26)和电极通过由具有高热导率的导电材料形成的热调平板(30)连接 电导率。 散热板(40)设置在安装有第一和第二电子设备(24,26)的绝缘基板(22)的下方。 第二电子设备(26)被延伸穿过绝缘基板(22)和散热板(40)的散热路径和延伸穿过第二电子设备(26)和电极的散热路径 散热板。 第一和第二电子设备(24,26)由于通过热调平板(30)的热辐射而具有基本相同的温度。 结果,可以提高电子设备(24,26)的冷却效果。
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公开(公告)号:EP0901746A4
公开(公告)日:2000-01-12
申请号:EP97916879
申请日:1997-03-20
发明人: LEAVITT FREDERICK A , BASS JOHN C , ELSNER NORBERT
CPC分类号: H01L35/00 , H01L35/32 , H01L35/34 , Y10S257/93 , Y10T29/49352
摘要: A thermoelectric module (45) contains thermoelectric elements installed in a gapless eggcrate. An eggcrate having walls without gaps is formed using a technique such as injection molding. This gapless eggcrate provides insulated spaces for a large number of p-type and n-type thermoelectric elements. The absence of gaps in the walls of the spaces virtually eliminates the possibility of interwall shorts between the elements even when electrical connections are made by metal spray techniques. Fabrication of the gapless eggcrate can be automated using several available techniques such as molding and casting to greatly reduce the labor cost of fabricating thermoelectric eggcrates as compared to prior art techniques of fabricating eggcrates. Thermoelectric elements (45), both p-type and n-type, are fabricated and are inserted into the insulated spaces in the gapless eggcrate in a predetermined manner to provide the desired thermoelectric effects for a predetermined type of application. Electrical connections are established on both the hot and cold sides of the module to connect the thermoelectric elements in series or parallel as desired.
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公开(公告)号:EP0772238A3
公开(公告)日:1999-11-24
申请号:EP96117505.6
申请日:1996-10-31
IPC分类号: H01L27/02
CPC分类号: H01L27/0248 , H01L27/0259 , H01L27/0266 , Y10S257/93
摘要: One embodiment of the instant invention is an electrostatic discharge protection device (10) which includes a field-effect transistor, the field-effect transistor comprising: a substrate (12) of a first conductivity type and having a surface and a backside; a gate structure (18) insulatively disposed on the substrate; a blocking region (30) disposed on the substrate and adjacent to the gate structure; a lightly-doped region (32) of a second conductivity type opposite the first conductivity type and disposed within the substrate and beneath the blocking region; a channel region (14) disposed within the substrate, under the gate structure, and adjacent the lightly-doped region; a first doped region (38) of the second conductivity type and disposed within the substrate and adjacent to the lightly doped region, the first doped region spaced away from the channel region by the lightly-doped region; and a second doped region (22) of the second conductivity type and disposed within the substrate, the second doped region spaced away from the first doped region by the channel region. Preferably, a first bipolar transistor (210) is integrated into the electrostatic discharge device and is formed by the substrate, the lightly-doped region and the second doped region and a second bipolar transistor (212) integrated into the electrostatic discharge device and is formed by the substrate, the first doped region and the second doped region, the first bipolar transistor becoming conductive at a lower voltage during an ESD event than the second bipolar transistor but the second bipolar transistor able to carry more current during the ESD event.
摘要翻译: 本发明的一个实施例是一种包括场效应晶体管的静电放电保护装置(10),所述场效应晶体管包括:具有第一导电类型并具有表面和背面的衬底(12) 绝缘地设置在基板上的栅极结构(18) 阻挡区域(30),所述阻挡区域设置在所述衬底上并与所述栅极结构相邻; 与第一导电类型相反的第二导电类型的轻掺杂区域(32),所述轻掺杂区域设置在所述衬底内并且位于所述阻挡区域下方; 沟道区域(14),所述沟道区域设置在所述衬底内,在所述栅极结构下方并且与所述轻掺杂区域相邻; 第二导电类型的第一掺杂区域(38),所述第一掺杂区域设置在所述衬底内并与所述轻掺杂区域相邻,所述第一掺杂区域通过所述轻掺杂区域与所述沟道区域隔开; 和第二导电类型的第二掺杂区(22)并且设置在衬底内,所述第二掺杂区通过沟道区与第一掺杂区隔开。 优选地,第一双极晶体管(210)被集成到静电放电装置中并且由衬底,轻掺杂区域和第二掺杂区域以及集成到静电放电装置中的第二双极晶体管(212)形成并形成 通过衬底,第一掺杂区域和第二掺杂区域,在ESD事件期间,第一双极晶体管在较低的电压下变得比第二双极晶体管导电,而第二双极晶体管在ESD事件期间能够承载更多的电流。
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公开(公告)号:EP0901746A1
公开(公告)日:1999-03-17
申请号:EP97916879.0
申请日:1997-03-20
CPC分类号: H01L35/00 , H01L35/32 , H01L35/34 , Y10S257/93 , Y10T29/49352
摘要: A thermoelectric module (45) contains thermoelectric elements installed in a gapless eggcrate. An eggcrate having walls without gaps is formed using a technique such as injection molding. This gapless eggcrate provides insulated spaces for a large number of p-type and n-type thermoelectric elements. The absence of gaps in the walls of the spaces virtually eliminates the possibility of interwall shorts between the elements even when electrical connections are made by metal spray techniques. Fabrication of the gapless eggcrate can be automated using several available techniques such as molding and casting to greatly reduce the labor cost of fabricating thermoelectric eggcrates as compared to prior art techniques of fabricating eggcrates. Thermoelectric elements (45), both p-type and n-type, are fabricated and are inserted into the insulated spaces in the gapless eggcrate in a predetermined manner to provide the desired thermoelectric effects for a predetermined type of application. Electrical connections are established on both the hot and cold sides of the module to connect the thermoelectric elements in series or parallel as desired.
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