公开(公告)号：EP1187313B1

公开(公告)日：2008-02-20

申请号：EP01306666.7

申请日：2001-08-03

申请人： MediaTek, Inc

发明人： Park, Joshua C.

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/45286 ,  H03F2200/153 ,  H03F2203/45304 ,  H03F2203/45352 ,  H03F2203/45392 ,  H03F2203/45544 ,  H03F2203/45566 ,  H03F2203/45631 ,  H03F2203/45651

公开(公告)号：EP1522142B1

公开(公告)日：2007-11-28

申请号：EP03763596.8

申请日：2003-07-08

申请人： Infineon Technologies AG

发明人： HEIGELMAYER, Bernhard ,  PRETL, Harald

IPC分类号： H03G1/00

CPC分类号： H03F3/45188 ,  H03F1/0205 ,  H03F1/32 ,  H03F3/24 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/336 ,  H03F2200/78 ,  H03F2203/45244 ,  H03F2203/45268 ,  H03F2203/45541 ,  H03F2203/45544 ,  H03F2203/45564 ,  H03F2203/45618 ,  H03F2203/45638 ,  H03F2203/45702 ,  H03F2203/7203

摘要： The invention relates to an amplifying circuit with adjustable amplification, which comprises a plurality of differential amplifiers (4) connected in parallel and connected to a common cascode (5). Said differential amplifiers (4) are independently activated by a control unit (12) in response to an applied control signal. The above-described principle eliminates, at high linearity, the need for inductances in the differential amplifier, thereby reducing unwanted crosstalk. The suggested principle also allows for adaptation of the power consumption of the amplifier to the tapped output power. The inventive principle is especially suitable for use in UMTS mobile radio devices.

公开(公告)号：EP1714385A1

公开(公告)日：2006-10-25

申请号：EP05700636.3

申请日：2005-02-09

申请人： Audioasics A/S

发明人： FÜRST, Claus, Erdmann ,  MUCHA, Igor

IPC分类号： H03F3/187 ,  H03F3/181 ,  H03F1/34 ,  H04R19/01 ,  H04R19/04 ,  H03F1/32 ,  H03F3/45

CPC分类号： H03F1/3211 ,  H03F1/34 ,  H03F3/181 ,  H03F3/187 ,  H03F3/45968 ,  H03F2200/03 ,  H03F2200/331 ,  H03F2203/45138 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45596 ,  H04R1/04 ,  H04R3/00 ,  H04R19/016 ,  H04R19/04

摘要： An integrated circuit, configured to process microphone signals, where the integrated circuit comprises: a preamplifier (306) with an amplifier section (301) which has a first input (ϕ) and a second input (ϕ*) and an output (φ), and with a feedback filter network (Z1; Z1, Z1 *, Z2) coupled between the output (φ; φ, φ*) and the second input (ϕ'); where the first input (ϕ) to the amplifier section (301) has an input impedance which by means of the input impedance of the amplifier section is substantially isolated from the feedback network with respect to input impedance; and where the preamplifier has a frequency-gain transfer function which suppress low frequencies; and an analogue-to-digital converter coupled to receive an anti-aliasing filtered input signal and providing a digital output signal (Do).

摘要翻译： 1。一种集成电路，其被配置为处理麦克风信号，其中集成电路包括：具有放大器部分（301）的前置放大器（306），所述放大器部分具有第一输入（φ）和第二输入（φ*）以及输出（φ） （φ;φ，φ*）和第二输入（φ'）之间的反馈滤波器网络（Z1; Z1，Z1 *，Z2） 其中到放大器部分（301）的第一输入（φ）具有输入阻抗，借助放大器部分的输入阻抗相对于输入阻抗基本上与反馈网络隔离; 并且其中前置放大器具有抑制低频率的频率增益传递函数; 以及模数转换器，其被耦合以接收抗混叠滤波输入信号并提供数字输出信号（Do）。

公开(公告)号：EP1289124A3

公开(公告)日：2004-04-14

申请号：EP02015780.6

申请日：2002-07-15

申请人： Nokia Corporation

发明人： Pettersson, Markus ,  Murtojardi, Simo

IPC分类号： H03D7/14

CPC分类号： H03F3/45089 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1491 ,  H03D7/165 ,  H03D2200/0025 ,  H03D2200/0033 ,  H03F3/45085 ,  H03F2203/45544 ,  H03F2203/45566 ,  H03F2203/45574 ,  H03F2203/45594 ,  H03F2203/45702

摘要： A circuit arrangement that stacks a modulator and automatic gain control (AGC) amplifier so as to re-use the modulator output current to drive the AGC amplifier, thereby saving power consumption and avoiding an unnecessary signal transformation between the two stages. A balanced circuit topology is used. The modulation signal can be selected over a wide range (100 MHz to 5.4 GHz) and the circuit arrangement is therefore particularly suitable for wireless applications (e.g. GSM-EDGE) and for integrated circuit fabrication.

摘要翻译： 叠加调制器和自动增益控制（AGC）放大器以便重新使用调制器输出电流来驱动AGC放大器的电路装置，从而节省功率消耗并避免两个阶段之间不必要的信号变换。 使用平衡电路拓扑。 调制信号可以在宽范围内（100MHz至5.4GHz）进行选择，因此电路装置特别适用于无线应用（例如GSM-EDGE）和集成电路制造。

公开(公告)号：EP0868023B1

公开(公告)日：2002-12-18

申请号：EP98105138.6

申请日：1998-03-20

申请人： Infineon Technologies AG

发明人： Kuttner, Franz

IPC分类号： H03F3/45

CPC分类号： H03F3/45753 ,  H03F2203/45544 ,  H03F2203/45658 ,  H03F2203/45722

公开(公告)号：EP1193863A2

公开(公告)日：2002-04-03

申请号：EP01307805.0

申请日：2001-09-13

申请人： Kabushiki Kaisha Toshiba

发明人： Toshiyuki, Umeda, c/o Intellectual Property Div. ,  Otaka, Shoji, c/o Intellectual Property Div.

IPC分类号： H03F1/32

CPC分类号： H03F3/45089 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0025 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03F1/3211 ,  H03F3/191 ,  H03F2203/45394 ,  H03F2203/45544 ,  H03F2203/45702 ,  H03F2203/45704 ,  H03F2203/45706

摘要： An amplifier circuit comprises a differential amplifier (102) configured by a differential pair of transistors, a common emitter amplifier (101) connected in parallel to the differential amplifier and configured by a pair of common-emitter configuration transistors, input and output terminals (Vin, Vout) which are common to the differential amplifier and the common emitter amplifier, and a bias controller (201) connected to the differential amplifier and the common emitter amplifier and configured to control a bias of at least one of the differential amplifier and the common emitter amplifier.

摘要翻译： 放大器电路包括由差分晶体管对构成的差分放大器（102），并联连接至差分放大器并由一对共发射极配置晶体管构成的共射极放大器（101），输入和输出端子（Vin ，Vout），以及偏置控制器（201），连接到所述差分放大器和所述公共发射极放大器，并且被配置为控制所述差分放大器和所述公共端中的至少一个的偏置 射极放大器。

公开(公告)号：EP1191683A2

公开(公告)日：2002-03-27

申请号：EP01306974.5

申请日：2001-08-16

申请人： Hitachi, Ltd.

发明人： Tsutsui, Takayuki, Hitachi Ltd. Int. Prop. Off. ,  Adachi, Tetsuaki, Hitachi Ltd. Int. Prop. Off.

IPC分类号： H03F1/30

CPC分类号： H03F3/45089 ,  H03F1/3211 ,  H03F3/245 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45392 ,  H03F2203/45544 ,  H03F2203/45702

摘要： A GSM system and an EDGE system much different in gain are incorporated into a single high frequency power amplifier module.
In a high frequency power amplifier module having a multi-stage amplifying configuration, which is used in a GSM mode and an EDGE mode according to switching, a first-stage amplifier comprises a dual gate MOSFET. In the EDGE mode, an APC signal or a selected and fixed potential is supplied to a first gate electrode of the dual gate MOSFET. Further, Vgs (Vgs1, Vgs2 and Vgs3) of respective transistors of from a first stage to a third stage are fixed in potential form or supplied as APC signals, and the gain in the EDGE mode is matched with that in the GSM mode, whereby the generation of noise is reduced.

公开(公告)号：EP0726648B1

公开(公告)日：2001-10-24

申请号：EP96200158.2

申请日：1996-01-23

申请人： Koninklijke Philips Electronics N.V.

发明人： Chevalier, Gilles

IPC分类号： H03F3/45 ,  H03B5/12

CPC分类号： H03F3/45089 ,  H03F2203/45296 ,  H03F2203/45302 ,  H03F2203/45311 ,  H03F2203/45352 ,  H03F2203/45544 ,  H03F2203/45654 ,  H03F2203/45696 ,  H03F2203/45702 ,  H03J5/244

公开(公告)号：EP0868023A1

公开(公告)日：1998-09-30

申请号：EP98105138.6

申请日：1998-03-20

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Kuttner, Franz

IPC分类号： H03F3/45

CPC分类号： H03F3/45753 ,  H03F2203/45544 ,  H03F2203/45658 ,  H03F2203/45722

摘要： Die Erfindung betrifft einen Komparator für einen großen Versorgungsspannungsbereich, bei dem einer Differenzverstärkerstufe (6) ein Sourcefolger (7) nachgeschaltet ist und ein Schalter (3) eine Rückkopplung vom Sourcefolger (7) zur Differenzverstärkerstufe (6) schließt. Zur Arbeitspunkteinstellung der Differenzverstärkerstufe (6) ist eine Diode des gleichen Leitfähigkeitstyps wie der Leitfähigkeitstyp des als Schalter (3) dienenden Transistors vorgesehen.

摘要翻译： 电路包括耦合到差分放大器级（6）的源极跟随器电路（7）和闭合从源极跟随器到差分放大器级的反馈回路的开关（3）。 提供与用作开关的晶体管相同导电类型的二极管（11）用于差分放大器级的偏置点调整。 该二极管优选地是连接在源极跟随器晶体管的栅极和电源电压（VSS）之间的NMOS二极管。

公开(公告)号：EP0549045B1

公开(公告)日：1996-11-27

申请号：EP92203929.2

申请日：1992-12-15

申请人： LABORATOIRES D'ELECTRONIQUE PHILIPS S.A.S. ,  Philips Electronics N.V.

发明人： Philippe, Pascal

IPC分类号： H03F3/45 ,  H03F1/02

CPC分类号： H03F1/0283 ,  H03F1/226 ,  H03F3/45376 ,  H03F3/45632 ,  H03F2203/45394 ,  H03F2203/45544 ,  H03F2203/45702