公开(公告)号：EP0492374B1

公开(公告)日：1996-02-07

申请号：EP91121650.5

申请日：1991-12-17

申请人： SGS-THOMSON MICROELECTRONICS S.r.l.

发明人： Botti, Edoardo ,  Brasca, Guido

IPC分类号： H03F3/30

CPC分类号： H03F3/45286 ,  H03F3/3008 ,  H03F3/3037 ,  H03F3/45291 ,  H03F2203/45028 ,  H03F2203/45188 ,  H03F2203/45471

公开(公告)号：EP0232847A3

公开(公告)日：1989-03-22

申请号：EP87101498.1

申请日：1987-02-04

申请人： Analog Devices, Inc.

发明人： Counts, Lewis W. ,  Close, JoAnn P.

IPC分类号： H03F3/45

CPC分类号： H03F3/45286 ,  H03F3/3071

摘要： A monolithic IC chip having a differential amplifier comprising a pair of JFETs with their top and back gates electrically isolated to provide a low-leakage-current input to the top gates. The amplifier includes independent bias circuitry for setting the potentials of the JFET back gates to a level close to that of the top gates. This circuitry includes resistive means coupled to the source electrodes of the input JFETs, and operable to establish a low-noise bias point for the back gates. The bias circuitry includes a reference current source comprising a pair of JFETs identical to the input JFETs and arranged to provide a gate-to-source voltage to match that of the input JFETs.

公开(公告)号：EP0810723A1

公开(公告)日：1997-12-03

申请号：EP96830311.5

申请日：1996-05-31

申请人： SGS-THOMSON MICROELECTRONICS s.r.l. ,  CO.RI.M.ME.

发明人： Pisati, Valerio ,  Alini, Roberto ,  Cosentino, Gaetano ,  Vai, Gianfranco

IPC分类号： H03H1/00 ,  H03F3/45 ,  H03F3/72

CPC分类号： H03F3/72 ,  H03F3/45286 ,  H03F2203/45302 ,  H03F2203/45304 ,  H03F2203/45371 ,  H03F2203/45396 ,  H03F2203/45506

摘要： A BiCMOS Transconductor differential stage (10) for high frequency filters comprises an input circuit portion having signal inputs (IN+,IN-) and comprising a pair of MOS transistors (M1,M2) having their respective gate terminals (G1,G2) corresponding to the signal inputs as well as an output circuit portion having signal outputs (OUT-,OUT+) and comprising a pair of two-pole transistors (Q1,Q2) connected together with a common base in a circuit node (B) and inserted between inputs (IN+,IN-) and outputs (OUT-,OUT+) in cascode configuration. The stage (10) in accordance with the present invention calls for a switching device (3) associated with at least one of said added two-pole transistors (Q1,Q2) to change the connections between the parasite capacitors present in the transconductor stage. The switching device (3) also comprises at least one added two-pole transistor (Q1x, Q2x) connected in a removable manner in parallel with the corresponding two-pole cascode transistor (Q1,Q2).
In a variant embodiment there are also provided respective added MOS transistors (M1x,M2x) connected in parallel with the MOS transistors (M1,M2) of the input portion to change the ratio W:L of each of the input transistors (M1,M2).

摘要翻译： 一种用于高频滤波器的BiCMOS跨导差分级（10）包括具有信号输入端（IN +，IN-）并包括一对MOS晶体管（M1，M2）的输入电路部分，所述一对MOS晶体管的各自的栅极端子（G1，G2） 信号输入端以及具有信号输出端（OUT-，OUT +）的输出电路部分，并且包括在电路节点（B）中用公共基极连接在一起的一对双极晶体管（Q1，Q2），并插入在输入端 （IN +，IN-）和输出（OUT-，OUT +）级联配置。 根据本发明的级（10）需要与所述增加的双极晶体管（Q1，Q2）中的至少一个相关联的开关器件（3）改变跨导级中存在的寄生电容器之间的连接。 开关器件（3）还包括至少一个与对应的双极共源共栅晶体管（Q1，Q2）并联连接的增加的双极晶体管（Q1x，Q2x）。 在变型实施例中，还提供了与输入部分的MOS晶体管（M1，M2）并联连接的相应增加的MOS晶体管（M1x，M2x），以改变每个输入晶体管（M1，M2）的比率W:L ）。

公开(公告)号：EP0492374A1

公开(公告)日：1992-07-01

申请号：EP91121650.5

申请日：1991-12-17

申请人： SGS-THOMSON MICROELECTRONICS S.r.l.

发明人： Botti, Edoardo ,  Brasca, Guido

IPC分类号： H03F3/30

CPC分类号： H03F3/45286 ,  H03F3/3008 ,  H03F3/3037 ,  H03F3/45291 ,  H03F2203/45028 ,  H03F2203/45188 ,  H03F2203/45471

摘要： Unitary-gain final stage particularly for monolithically integratable power amplifiers, which comprises a pair of final N-channel MOS power transistors (1,2). The first transistor (1) has its drain terminal connected to a supply voltage (3) and its source terminal connected to the drain terminal of the second transistor (2). The source terminal of the second transistor (2) is connected to the ground. The output terminal of the power amplifier is connected between the source terminal of the first transistor (1) and the drain terminal of the second transistor (2). The final stage furthermore comprises a high-gain feedback differential amplifier (5) which has its non-inverting input terminal connected to the input of the power amplifier, its inverting input terminal connected to the output terminal (4) of the differential amplifier (5) and its output terminal connected to the gate terminal of the second transistor (2). A leveling circuit (6) is furthermore connected to the gate terminal of the second transistor (2). A third MOS transistor (7) has its source terminal connected to the input of the amplifier, and its gate terminal and drain terminal are connected to the gate terminal of the first transistor (1) and to a first driven current source (8).

摘要翻译： 单一增益最终阶段，特别是用于单片可积分功率放大器，其包括一对最终的N沟道MOS功率晶体管（1,2）。 第一晶体管（1）的漏极端子连接到电源电压（3），其源极端子连接到第二晶体管（2）的漏极端子。 第二晶体管（2）的源极端子接地。 功率放大器的输出端子连接在第一晶体管（1）的源极端子和第二晶体管（2）的漏极端子之间。 最后阶段还包括高增益反馈差分放大器（5），其具有连接到功率放大器的输入的其非反相输入端，其反相输入端连接到差分放大器（5）的输出端（4） ），其输出端子连接到第二晶体管（2）的栅极端子。 此外，调平电路（6）连接到第二晶体管（2）的栅极端子。 第三MOS晶体管（7）的源极端子连接到放大器的输入，其栅极端子和漏极端子连接到第一晶体管（1）的栅极端子和第一驱动电流源（8）。

公开(公告)号：EP0429829A2

公开(公告)日：1991-06-05

申请号：EP90119872.1

申请日：1990-10-17

申请人： SGS-THOMSON MICROELECTRONICS S.r.l.

发明人： Gola, Alberto ,  Alzati, Angelo ,  Novelli, Aldo

IPC分类号： H03K5/24 ,  H03F3/45

CPC分类号： H03F3/4508 ,  H03F3/45076 ,  H03F3/45179 ,  H03F3/45286 ,  H03F3/45291 ,  H03F2203/45028 ,  H03F2203/45144 ,  H03F2203/45188 ,  H03F2203/45304 ,  H03F2203/45612 ,  H03K5/2445

摘要： An electronic comparator circuit (1), of a type which comprises a first, differential stage (2) input circuit portion provided with a differential pair of bipolar transistors (T2,T3) forming respective outputs of thee input portion (2), is further provided with an output stage (3) comprising a first pair of MOS transistors (M1,M2), with gate electrodes (G1,G2) in common, respectively connected on the one side to said outputs (C2,C3) and on the other side to a positive supply pole (Vc) via a current mirror circuit, and a second pair of MOS transistors (M5,M6), with gate electrodes (G5,G6) in common, connected between said outputs (C2,C3) and ground. A drain electrode (D2) of the first pair of MOS transistors (M1,M2) forms an output (OUT) for the comparator (1), the latter having shown itself to be specially fast during the switch phase and combining the advantages of bipolar technology circuits and of those in the CMOS technology.

摘要翻译： 一种电子比较器电路（1），其包括形成有形成所述输入部分（2）的各个输出的双极晶体管（T2，T3）的差分对的第一差分级（2）输入电路部分， 设置有包括第一对MOS晶体管（M1，M2）的输出级（3），其中共同的栅电极（G1，G2）分别连接到所述输出端（C2，C3）和另一侧 通过电流镜电路连接到正电源极（Vc），以及连接在所述输出（C2，C3）和地之间的具有栅电极（G5，G6）的第二对MOS晶体管（M5，M6） 。 第一对MOS晶体管（M1，M2）的漏电极（D2）形成用于比较器（1）的输出（OUT），后者在开关阶段显示为特别快，并且结合了双极性的优点 技术电路和CMOS技术电路。

公开(公告)号：EP1187313A1

公开(公告)日：2002-03-13

申请号：EP01306666.7

申请日：2001-08-03

申请人： International Business Machines Corporation

发明人： Park, Joshua C.

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/45286 ,  H03F2200/153 ,  H03F2203/45304 ,  H03F2203/45352 ,  H03F2203/45392 ,  H03F2203/45544 ,  H03F2203/45566 ,  H03F2203/45631 ,  H03F2203/45651

摘要： A transconductance amplifier and method for improving the phase response and linearity. A differential amplifier circuit receives differential signals for amplification on respective bases of input bipolar transistors. The transistors amplify a small signal received on the based connections to produce an amplified output current. The differential amplifier circuit is connected to load impedances which form a cascode transconductance amplifier output stage. Feedback transistors provide a feedback voltage from the emitters of each of the different bipolar transistors to the base, improving the linearity of the differential amplifier. Phase compensation is provided by cross coupling through first and second capacitors a portion of each individual differential signal component to the base connections of the differential amplifier input transistor.

摘要翻译： 一种用于提高相位响应和线性度的跨导放大器和方法。 差分放大器电路在输入双极晶体管的各个基极上接收用于放大的差分信号。 晶体管放大基于连接的接收的小信号以产生放大的输出电流。 差分放大器电路连接到形成共源共栅跨导放大器输出级的负载阻抗。 反馈晶体管提供从每个不同双极晶体管的发射极到基极的反馈电压，从而改善差分放大器的线性度。 相位补偿通过第一和第二电容器将每个单独差分信号分量的一部分交叉耦合到差分放大器输入晶体管的基极连接来提供。

公开(公告)号：EP0544627A1

公开(公告)日：1993-06-02

申请号：EP92830505.1

申请日：1992-09-18

申请人： SGS-THOMSON MICROELECTRONICS S.r.l.

发明人： Zuffada, Maurizio ,  Vai, Gianfranco ,  Gregori, Marco ,  Moloney, David ,  Betti, Giorgio

IPC分类号： H03F3/45

CPC分类号： H03F3/4508 ,  H03F1/223 ,  H03F3/45286 ,  H03F2203/45304 ,  H03F2203/45674 ,  H03F2203/45696

摘要： A circuit device (1) for neutralizing thermal drift in a transconductor differential stage (4), comprises:

a first circuit portion (2) which corresponds structurally to said transconductor differential stage (4) and has a pair of MOS input transistors (M1,M2) defining a transconductance value which is substantially proportional to that of the transconductor stage (4), and
a second pair of bipolar output transistors (Q1,Q2) coupled to the aforementioned ones in a cascode configuration, and
a second circuit portion (3) which comprises means (Q4,Q5,Q6,Q7) being supplied a current (Ia) from an output (C2) of said first differential portion (2) to thereby output (D4) a current (Iu) to be passed to the stage (4) whose value is inversely proportional to temperature-dependent parameters of the transconductance.

摘要翻译： 一种用于中和跨导差分级（4）中的热漂移的电路装置（1），包括：在结构上对应于所述跨导差分级（4）的第一电路部分（2），并具有一对MOS输入晶体管（M1， M2），其定义了与跨导级（4）的跨导值基本成比例的跨导值;以及第二对双极性输出晶体管（Q1，Q2），其以共源共栅结构耦合到上述的双极性输出晶体管，以及第二电路部分 ），其包括从所述第一差分部分（2）的输出（C2）提供电流（Ia）的装置（Q4，Q5，Q6，Q7），从而输出（D4）要传递到 阶段（4），其值与跨导温度相关参数成反比。

公开(公告)号：EP0331778A1

公开(公告)日：1989-09-13

申请号：EP88103693.3

申请日：1988-03-09

申请人： Hewlett-Packard GmbH

发明人： Berkel, Werner

IPC分类号： H03K5/02 ,  H03F1/22

CPC分类号： H03F1/226 ,  H03F3/45286 ,  H03K5/023 ,  H03K19/01825 ,  H03K19/0952

摘要： An output amplifier for pulse generators comprises a first bipo­lar transistor amplifier stage (4) and a second gallium arsenide field-effect (GaAs FET) transistor stage (5). The GaAs FET transistor amplifier stage (5) is used to generate high output swing and fast transition times over a wide frequency band, whereas the bipolar tran­sistor amplifier stage (4) provides high gain and compensation of the GaAs anomalies.

摘要翻译： 用于脉冲发生器的输出放大器包括第一双极晶体管放大器级（4）和第二砷化镓场效应（GaAs FET）晶体管级（5）。 GaAs FET晶体管放大器级（5）用于在宽频带上产生高输出摆幅和快速转换时间，而双极晶体管放大器级（4）提供GaAs异常的高增益和补偿。

公开(公告)号：EP0232847A2

公开(公告)日：1987-08-19

申请号：EP87101498.1

申请日：1987-02-04

申请人： Analog Devices, Inc.

发明人： Counts, Lewis W. ,  Close, JoAnn P.

IPC分类号： H03F3/45

CPC分类号： H03F3/45286 ,  H03F3/3071

摘要： A monolithic IC chip having a differential amplifier comprising a pair of JFETs with their top and back gates electrically isolated to provide a low-leakage-current input to the top gates. The amplifier includes independent bias circuitry for setting the potentials of the JFET back gates to a level close to that of the top gates. This circuitry includes resistive means coupled to the source electrodes of the input JFETs, and operable to establish a low-noise bias point for the back gates. The bias circuitry includes a reference current source comprising a pair of JFETs identical to the input JFETs and arranged to provide a gate-to-source voltage to match that of the input JFETs.

公开(公告)号：EP2688204A1

公开(公告)日：2014-01-22

申请号：EP11875909.1

申请日：2011-11-14

申请人： Fuji Electric Co., Ltd.

发明人： SUZUKI, Takeshi ,  MATSUO, Naoyuki ,  KISHIRO, Masami

IPC分类号： H03F3/70 ,  H03F3/45 ,  H03G3/10

CPC分类号： H03G1/0023 ,  G01D5/24 ,  G01L9/08 ,  G01L9/12 ,  G01P15/125 ,  G01R27/025 ,  G01R29/24 ,  G01R31/2829 ,  H03F3/45183 ,  H03F3/45286 ,  H03F3/45475 ,  H03F3/70 ,  H03F2203/45521 ,  H03F2203/45526

摘要： Provided is an electric charge detection circuit that enables easily performing gain adjustment on the input side of a differential amplifier circuit. Ends on one side of physical quantity detection sensors 21, 22 formed of any of an electric charge generation-type sensor and a capacitance change-type sensor are connected to negative electrode input terminals of a differential amplifier circuit 1, and ends on the other side are connected to positive electrode input terminals of the differential amplifier circuit 1. A feedback resistor Rf and a feedback capacitor Cf are connected in parallel between the negative electrode input terminal and an output terminal of the differential amplifier circuit 1, and a cancel resistor Rc and a cancel capacitor Cc are connected in parallel between a reference voltage and the positive electrode input terminal of the differential amplifier circuit 1. Drain voltage adjustment circuits 12, 13 are provided that adjust the drain voltage of at least one of two field effect transistors FET 1, FET 2 to which positive and negative differential inputs of the differential amplifier circuit 1 are individually inputted. Gain adjustment of at least one of the positive and negative differential inputs is thus enabled.

摘要翻译： 提供了一种电荷检测电路，其能够容易地在差分放大器电路的输入侧执行增益调整。 由电荷产生型传感器和电容变化型传感器中的任何一个形成的物理量检测传感器21,22的一侧连接到差分放大器电路1的负极输入端，并且在另一侧 连接到差分放大器电路1的正极输入端子。反馈电阻器Rf和反馈电容器Cf并联连接在负极输入端子和差分放大器电路1的输出端子之间，并且消除电阻器Rc和 取消电容器Cc并联连接在基准电压和差分放大器电路1的正极输入端子之间。设置漏极电压调节电路12,13，调节两个场效应晶体管FET1至少一个的漏极电压 ，差分放大器电路1的正和负差分输入单独进入的FET 2 推杆。 因此可以使正负差分输入中的至少一个的增益调整。