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    METHOD FOR PROCESSING SEMICONDUCTOR WAFER, METHOD FOR MANUFACTURING BONDED WAFER, AND METHOD FOR MANUFACTURING EPITAXIAL WAFER
    1.
    发明公开
    METHOD FOR PROCESSING SEMICONDUCTOR WAFER, METHOD FOR MANUFACTURING BONDED WAFER, AND METHOD FOR MANUFACTURING EPITAXIAL WAFER 审中-公开

    公开(公告)号：EP3193357A4

    公开(公告)日：2018-08-01

    申请号：EP15839615

    申请日：2015-08-19

    申请人： SHINETSU HANDOTAI KK

    发明人： MIYAZAWA YUKI ,  KIDA TAKAHIRO ,  TAKANO TOMOFUMI

    IPC分类号： H01L21/304 ,  B24B9/00 ,  H01L21/02 ,  H01L27/12

    CPC分类号： H01L21/02024 ,  B24B9/065 ,  B24B49/04 ,  H01L21/02 ,  H01L21/02428 ,  H01L21/304 ,  H01L21/67092 ,  H01L21/76254 ,  H01L22/26 ,  H01L27/12

    摘要： The present invention is a method for processing a semiconductor wafer having a front surface, a back surface, and a chamfered portion composed of a chamfered surface on the front surface side, a chamfered surface on the back surface side, and an end face at a peripheral end, including: mirror-polishing of each portion of the chamfered surface on the front surface side, the chamfered surface on the back surface side, the end face, and an outermost peripheral portion on the front surface or the back surface adjacent to the chamfered surface; wherein the mirror-polishing of the end face and the mirror-polishing of the outermost peripheral portion on the front surface or the back surface are performed in one step, after a step of mirror-polishing the chamfered surface on the front surface side and a step of mirror-polishing the chamfered surface on the back surface side, and a roll-off amount of the outermost peripheral portion on the front surface or the back surface is adjusted by the one step-performed mirror-polishing of the end face and the outermost peripheral portion. This provides a method for processing a semiconductor wafer which can form a desired sag shape at the outermost peripheral portion with high accuracy without deforming the shape of the internal side from the outermost peripheral portion of the semiconductor wafer, and can process a semiconductor wafer not to have a sharp edge shape after the processing.

    METHOD FOR MANUFACTURING BONDED WAFER
    3.
    发明公开
    METHOD FOR MANUFACTURING BONDED WAFER 审中-公开
    HERSTELLUNGSVERFAHRENFÜRGEBUNDENE WAFER

    公开(公告)号：EP2579296A4

    公开(公告)日：2013-12-04

    申请号：EP11789383

    申请日：2011-04-21

    申请人： SHINETSU HANDOTAI KK

    发明人： AGA HIROJI ,  OKA SATOSHI ,  NOTO NOBUHIKO

    IPC分类号： H01L21/02 ,  H01L21/324 ,  H01L21/762 ,  H01L27/12

    CPC分类号： H01L21/265 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3247 ,  H01L21/76254

    摘要： The present invention is a method for manufacturing a bonded wafer including: forming an ion-implanted layer in the bond wafer; bonding the bond wafer to a base wafer; delaminating the bond wafer at the ion-implanted layer; and then performing a flattening heat treatment on a surface after the delamination, in which a silicon single crystal wafer, in which a region to form the ion-implanted layer has a resistivity of 0.2 ©cm or less is used as the bond wafer, the ion-implanted layer is formed in a condition where a dose of the ion for forming the ion-implanted layer is equal to or less than 4×10 16 /cm 2 , and the flattening heat treatment on the surface after the delamination is performed by a heat treatment in an atmosphere including HCl gas. As a result, there is provided a method for manufacturing a bonded wafer having a low resistivity thin film (SOI layer) that contains dopant such as boron with high concentration according to the ion implantation delamination method, in which outward diffusion of dopant and suction due to oxidation can be inhibited to maintain low resistivity.

    摘要翻译： 本发明是一种制造键合晶片的方法，包括：在键合晶片中形成离子注入层; 将结合晶片结合到基底晶片; 在离子注入层处剥离键合晶片; 然后在剥离后的表面上进行平坦化热处理，其中使用其中形成离子注入层的区域具有0.2Ωcm或更小的电阻率的硅单晶片作为结合晶片， 在用于形成离子注入层的离子的剂量等于或小于4×10 16 / cm 2的条件下形成离子注入层，并且通过以下方式进行分层后的表面上的平坦化热处理： 在包含HCl气体的气氛中进行热处理。 结果，根据离子注入剥离方法，提供了一种用于制造具有低浓度电阻薄膜（SOI层）的键合晶片的方法，该方法根据离子注入分层方法以高浓度含有掺杂剂如硼，其中掺杂剂向外扩散和到期吸引 可以抑制氧化以保持低电阻率。