摘要:
An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
摘要:
A single fin or a pair of co-integrated n- and p- type single crystal electronic device fins are epitaxially grown from a substrate surface at a bottom of one or a pair of trenches formed between shallow trench isolation (STI) regions. The fin or fins are patterned and the STI regions are etched to form a height of the fin or fins extending above etched top surfaces of the STI regions. The fin heights may be at least 1.5 times their width. The exposed sidewall surfaces and a top surface of each fin is epitaxially clad with one or more conformal epitaxial materials to form device layers on the fin. Prior to growing the fins, a blanket buffer epitaxial material may be grown from the substrate surface; and the fins grown in STI trenches formed above the blanket layer. Such formation of fins reduces defects from material interface lattice mismatches.
摘要:
A light-emitting diode with reduced light absorption, a method of manufacturing the same, a lamp and an illumination device are provided. A light-emitting diode (100) is provided with: a compound semiconductor layer (10) including a light-emitting layer (24) provided on a substrate (1); an ohmic contact electrode (7) provided between the substrate (1) and the compound semiconductor layer (10); an ohmic electrode (11) provided on the side of the compound semiconductor layer (10) opposite to the substrate (1); a surface electrode (12) including a branch section (12b) provided so as to cover the surface of the ohmic electrode (11) and a pad section (12a) coupled to the branch section (12b); and a current-blocking portion (13) provided between an under-pad light-emitting layer (24a) arranged in an area of the light-emitting layer (24) that overlaps the pad section (12a) in a planar view and a light-emitting layer (24) arranged in an area except the area that overlaps the pad section (12a) in a planar view, to prevent the current supplied to the under-pad light-emitting layer (24a).
摘要:
A method for manufacturing a semiconductor device and semiconductor manufactured thereby, comprising growing, from a seed island mesa, an abrupt hetero-junction comprising a semiconductor crystal with few crystal defects on a dissimilar substrate (50) that can be used as light emitting and photovoltaic devices.
摘要:
The application discloses a technique for fabricating gallium-arsenide-phosphorous (GaAsP) nanostructures using gallium-assisted (Ga-assisted) Vapour-Liquid-Solid (VLS ) growth, i.e. without requiring gold catalyst particles. The resulting Ga-assisted GaAsP nanostructures may be free of gold particles, which renders them useful for optoelectronic applications, e.g. as a junction in a solar cell. The Ga-assisted GaAsP nanostructures can be fabricated with a band gap in the range 1.6 to 1.8 eV (e.g. at and around 1.7 eV).
摘要:
An opto-electronic device, such as a solar cell or a light emitting diode, is fabricated by forming a nucleating layer (22) on a p-type group IV layer (20). The nucleating layer (22) includes a III-V compound selected from the group consisting of AlAs, AlSb, AIN, Bas, BSb, GaN, GaSB, and InAs. A first III-V compound layer (24) is formed on the nucleating layer (22) and includes as group III element, at least one of gallium, indium, and aluminium, and as a group V element, phosphorus. The p-type group IV layer, which may be a p-type silicon layer, includes phosphorus atoms diffused from the first III-V compound layer, the concentration of the phosphorus atoms therein being a function of the thickness of the nucleating layer. The first III-V compound layer includes group IV atoms diffused from the p-type group IV layer, the concentration of the group IV atoms therein being a function of the thickness of the nucleating layer.
摘要:
Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping (ART) and epitaxial layer overgrowth (ELO). In general, in a first aspect, embodiments of the invention may include a method of forming a structure. The method includes forming a first opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semiconductor material lattice-mismatched to the first semiconductor material, is formed within the first opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer.