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公开(公告)号：EP1060563A4
公开(公告)日：2008-12-31
申请号：EP99905754
申请日：1999-02-05
发明人： DELANO CARY L , TRIPATHI ADYA S
IPC分类号： H03K7/00 , H03K7/08 , H01Q11/12 , H02M7/5395 , H03C1/06 , H03F1/02 , H03F3/217 , H04B1/04 , H04B1/10
摘要： A modulator loop (700) designed to operate in a frequency range of interest is described. The loop (704) includes a loop output terminal and a switching stage, the output of which is coupled to the loop output terminal. The switching stage (704) has a first delay associated therewith. The output of a modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the loop output terminal and the feedback input of the modulator stage. A feedback filter is coupled between the output of the modulator stage and the feedback input of the modulator stage which compensates for the first delay. The feedback filter (708) is operable to transmit frequencies outside the frequency range of interest and attenuate frequencies in the frequency range of interest.
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公开(公告)号：EP1099303A1
公开(公告)日：2001-05-16
申请号：EP99948313.4
申请日：1999-09-17
IPC分类号： H03G3/30
CPC分类号： H03G3/001 , H03G1/0088
摘要： A control circuit (200) for controlling a level of an audio signal and transmitting the signal to an amplifier (AMP2) is described. The control circuit is based on an R-2R resistor network having a plurality of resistor nodes. A plurality of switches (S1, S2) alternately connects each of the plurality of resistor nodes to one of a plurality of low impedance nodes and a low impedance input node associated with the amplifier. Switch control circuitry (202) selectively controls the plurality of switches to transmit the audio signal to the low impedance input node.
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公开(公告)号：EP0906659A1
公开(公告)日：1999-04-07
申请号：EP97926821.0
申请日：1997-05-28
摘要： A signal processing circuit is provided which includes a frequency selective network (314) in a feedback loop for noise shaping purposes. A sampling analog-to-digital converter (318) in the feedback loop operates at a sampling frequency substantially above the Nyquist frequency. A switching device (312) is driven by the sampling analog-to-digital converter and produces a continuous-time output signal which is continuously monitored by and fed back to the frequency selective network (314) for noise and distorsion correction in the feedback loop. State feedback (i.e., digital or sampled) of the output of the analog-to-digital converter may also be employed in combination with the continuous-time feedback of the switching output.
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公开(公告)号：EP1723717A4
公开(公告)日：2008-04-02
申请号：EP04811174
申请日：2004-11-16
发明人： MAZDA BABAK
IPC分类号： G01R19/00 , G01R15/18 , G01R19/25 , G05F1/40 , H03F20060101
CPC分类号： G01R19/0092 , G01R15/18 , G01R19/2513
摘要： A circuit for sensing a current in an inductor is described. Integrator circuitry is operable to generate a first signal representing an integration of a voltage across the inductor. Comparison circuitry is operable to generate a reset signal each time the first signal reaches either a positive or negative threshold. The reset signal is for resetting the integrator circuitry. Logic circuitry is operable to generate a count direction signal indicating which of the positive and negative thresholds was reached to generate the reset signal. Counter circuitry is operable to increment or decrement a count representing the current in the inductor in response to the reset and count direction signals.
摘要翻译： 描述了用于感测电感器中的电流的电路。 积分器电路可操作以产生表示电感器上的电压的积分的第一信号。 每当第一信号达到正阈值或负阈值时，比较电路就可操作以产生复位信号。 复位信号用于复位积分电路。 逻辑电路可操作以生成指示达到正阈值和负阈值中的哪一个以产生重置信号的计数方向信号。 响应于复位和计数方向信号，计数器电路可操作以递增或递减表示电感器中的电流的计数。
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公开(公告)号：EP1723717A2
公开(公告)日：2006-11-22
申请号：EP04811174.4
申请日：2004-11-16
发明人： MAZDA, Babak
IPC分类号： H03F1/00
CPC分类号： G01R19/0092 , G01R15/18 , G01R19/2513
摘要： A circuit (100) for sensing a current in an inductor (102) is described. Integrator (104,106) circuitry is operable to generate a first signal representing an integration of a voltage across the inductor (102). Comparison circuitry (110,112) is operable to generate a reset signal each time the first signal reaches either a positive or negative threshold. The reset signal is for resetting the integrator (104,106) circuitry. Logic circuitry is operable to generate a count direction signal indicating which of the positive and negative thresholds was reached to generate the reset signal. Counter circuitry (120) is operable to increment or decrement a count representing the current in the inductor (102) in response to the reset and count direction signals.
摘要翻译： 描述用于感测电感器（102）中的电流的电路（100）。 积分器（104,106）电路可操作以产生表示跨越电感器（102）的电压的积分的第一信号。 每次第一信号达到正阈值或负阈值时，比较电路（110,112）都可操作以产生复位信号。 复位信号用于复位积分器（104,106）电路。 逻辑电路可操作以生成指示达到正阈值和负阈值中的哪一个以产生重置信号的计数方向信号。 计数器电路（120）响应于复位和计数方向信号而可操作以递增或递减表示电感器（102）中的电流的计数。
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6.发明公开DC OFFSET CALIBRATION FOR A DIGITAL SWITCHING AMPLIFIER 审中-公开GLEICHSPANN8UNGSOFFSETKALIBRIERUNGFÜREINEN DIGITALENSCHALTVERSTÄRKER
公开(公告)号：EP1201023A4
公开(公告)日：2005-11-02
申请号：EP00948943
申请日：2000-07-25
发明人： MIAO GUOQING , DELANO CARY
CPC分类号： H03F3/217 , G06J1/00 , H03F1/30 , H03F3/2171 , H03H11/1252
摘要： An offset voltage calibration circuit for use with a digital switching amplifier (400). The calibration circuit includes an analog-to-digital converter (406) for converting at least one DC offset voltage associated with the digital switching amplifier (400) to digital offset data. A memory (408) stores the digital offset data. Control circuitry (402) controls the analog-to-digital converter (406). A digital-to-analog converter (404) coupled to the memory (408) receives the digital offset data and generates an offset compensation voltage for applying to an input port of the digital switching amplifier which thereby cancels at least a portion of the at least one DC offset voltage.
摘要翻译： 与数字开关放大器（400）一起使用的偏移电压校准电路。 校准电路包括用于将与数字开关放大器（400）相关联的至少一个DC偏移电压转换为数字偏移数据的模数转换器（406）。 存储器（408）存储数字偏移数据。 控制电路（402）控制模数转换器（406）。 耦合到存储器（408）的数字 - 模拟转换器（404）接收数字偏移数据并且生成偏移补偿电压，用于施加到数字开关放大器的输入端口，从而取消至少一部分至少一部分 一个DC偏移电压。
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公开(公告)号：EP1543611A2
公开(公告)日：2005-06-22
申请号：EP03793038.5
申请日：2003-08-12
发明人： MAZDA, Babak
IPC分类号： H03F3/217
CPC分类号： H02M1/08 , H02M3/1588 , H03F1/305 , H03F3/217 , H03F3/2171 , H03F2200/331 , Y02B70/1466
摘要： A switching circuit is described which includes an output switch having a drive terminal and a power supply terminal. Driver circuitry provides a drive signal to the output switch. Isolation circuitry provides DC isolation between the driver circuitry and the output switch. Transient control circuitry controls the drive terminal, thereby keeping the output switch off during stabilization of a supply voltage at the power supply terminal.
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公开(公告)号：EP1060563A1
公开(公告)日：2000-12-20
申请号：EP99905754.0
申请日：1999-02-05
摘要： A modulator loop (700) designed to operate in a frequency range of interest is described. The loop (704) includes a loop output terminal and a switching stage, the output of which is coupled to the loop output terminal. The switching stage (704) has a first delay associated therewith. The output of a modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the loop output terminal and the feedback input of the modulator stage. A feedback filter is coupled between the output of the modulator stage and the feedback input of the modulator stage which compensates for the first delay. The feedback filter (708) is operable to transmit frequencies outside the frequency range of interest and attenuate frequencies in the frequency range of interest.
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9.发明公开METHODS AND APPARATUS FOR REDUCING MOSFET BODY DIODE CONDUCTION IN A HALF-BRIDGE CONFIGURATION 审中-公开方法和装置以降低车身线条一个半桥配置
公开(公告)号：EP1119900A4
公开(公告)日：2008-07-02
申请号：EP99949858
申请日：1999-09-24
发明人： BERG STEVEN K , DELANO CARY L
IPC分类号： H02M7/537 , H03K17/082 , H03K17/16 , H03K17/687 , H03L7/093
CPC分类号： H03K17/0822 , H02M7/5387 , H02M2001/0045 , H02M2001/0048 , H02M2003/1555 , Y02B70/1491
摘要： Methods and apparatus for operating first (M1) and second (M2) switches arranged in a half-bridge configuration are described. One of the first and second gate voltages is controlled such that the corresponding one of the first and second switches operates as a constant current source.
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公开(公告)号：EP1099303A4
公开(公告)日：2004-07-07
申请号：EP99948313
申请日：1999-09-17
发明人： LLEWELLYN WILLIAM D , DELANO CARY L
CPC分类号： H03G3/001 , H03G1/0088
摘要： A control circuit (200) for controlling a level of an audio signal and transmitting the signal to an amplifier (AMP2) is described. The control circuit is based on an R-2R resistor network having a plurality of resistor nodes. A plurality of switches (S1, S2) alternately connects each of the plurality of resistor nodes to one of a plurality of low impedance nodes and a low impedance input node associated with the amplifier. Switch control circuitry (202) selectively controls the plurality of switches to transmit the audio signal to the low impedance input node.
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