ANTIFUSE-TYPE ONE TIME PROGRAMMING MEMORY WITH FORKSHEET TRANSISTORS

    公开(公告)号:EP4435866A1

    公开(公告)日:2024-09-25

    申请号:EP24155903.8

    申请日:2024-02-06

    摘要: An antifuse-type one time programming memory includes a first memory cell. The first memory cell includes at least one antifuse transistor. The antifuse transistor is forksheet transistor. The antifuse transistor includes a first nanowire, a first gate structure, a first drain/source structure and a second drain/source structure. A first-portion surface of the first nanowire is contacted with the isolation wall. A second-portion surface of the first nanowire is contacted with the first gate structure. The first gate structure includes a first spacer, a second spacer, a first gate dielectric layer and a first gate layer. The first drain/source structure is electrically contacted with a first terminal of the first nanowire. The second drain/source structure is electrically contacted with a second terminal of the first nanowire.

    PROGRAMMING AND VERIFYING METHOD FOR MULTI-LEVEL MEMORY CELL ARRAY

    公开(公告)号:EP3968330A1

    公开(公告)日:2022-03-16

    申请号:EP20209530.3

    申请日:2020-11-24

    摘要: A programming and verifying method for a multi-level memory cell array includes following steps. In a step (a1), a first row of the multi-level memory cell array is set as a selected row, and A is set as 1. In a step (a2), memory cells in the selected row excluding the memory cells in the target storage state and bad memory cells are programmed to the A-th storage state. In a step (a3), if A is not equal to X, 1 is added to X and the step (a2) is performed again. In a step (a4), if A is equal to X, the program cycle is ended. In the step (a2), the first-portion memory cells of the selected row are subjected to plural write actions and plural verification actions until all of the first-portion memory cells reach the A-th storage state.

    RANDOM NUMBER GENERATOR
    5.
    发明公开

    公开(公告)号:EP3709157A1

    公开(公告)日:2020-09-16

    申请号:EP20158560.1

    申请日:2020-02-20

    IPC分类号: G06F7/58

    摘要: A random number generator includes a counting value generator, an address generator, a static entropy source and a processing circuit. The counting value generator generates a first random number. The address generator generates an address signal. The static entropy source is connected with the address generator to receive the address signal and generates a second random number. The processing circuit is connected with the static entropy source and the counting value generator to receive the first random number and the second random number. After the first random number and the second random number are processed by the processing circuit, the processing circuit generates an output random number.

    ANTIFUSE PUF BASED SECURITY SYSTEM FOR KEY GENERATION

    公开(公告)号:EP3454318A1

    公开(公告)日:2019-03-13

    申请号:EP18160641.9

    申请日:2018-03-08

    IPC分类号: G09C1/00 H04L9/08 G06F21/86

    摘要: A security system (100) with entropy bits includes a physically unclonable function circuit (110), and a security key generator (120). The physically unclonable function circuit (110) provides a plurality of entropy bit strings (S1 to S6). The security key generator (120) generates a security key (S1) by manipulating a manipulation bit string derived from the plurality of entropy bit strings (S1 to S6) according to an operation entropy bit string. Each bit of the operation entropy bit string is used to determine whether to perform a corresponding operation to the manipulation bit string.