Bolometer and method for measurement of electromagnetic radiation
    1.
    发明公开
    Bolometer and method for measurement of electromagnetic radiation 审中-公开
    Bolometer und Verfahren zum Messen elektromagnetischer Strahlung

    公开(公告)号:EP2942609A1

    公开(公告)日:2015-11-11

    申请号:EP14167385.5

    申请日:2014-05-07

    申请人: ams AG

    IPC分类号: G01J5/20 G01J5/02

    CPC分类号: G01J5/02 G01J5/20

    摘要: A bolometer (10) comprises a first and a second suspension beam (12, 13) and a semiconductor portion (11) that is suspended by the first and the second suspension beam (12, 13) and comprises a first region (17) of a first conductivity type and a second region (18) of a second conductivity type. The first region (17) comprises a first triangle (21) or at least two stripes (40, 41) or islands (60, 61) which each contribute to a non-short-circuited diode (20) with the second region (18).

    摘要翻译: 测辐射热计(10)包括由第一和第二悬架梁(12,13)悬挂的第一和第二悬架梁(12,13)和半导体部分(11),并且包括第一区域(17) 第一导电类型和第二导电类型的第二区域(18)。 第一区域(17)包括第一三角形(21)或至少两条条纹(40,41)或岛状物(60,61),每条带有第二区域(18)的非短路二极管(20) )。

    Semiconductor device with through-substrate via of enhanced conductivity and corresponding fabrication method
    4.
    发明公开
    Semiconductor device with through-substrate via of enhanced conductivity and corresponding fabrication method 有权
    具有通孔镀敷具有改进的导电性和其制造方法的半导体器件

    公开(公告)号:EP2793254A1

    公开(公告)日:2014-10-22

    申请号:EP13163968.4

    申请日:2013-04-16

    申请人: AMS AG

    摘要: The semiconductor device comprises a substrate (1) with an upper surface (20), the substrate (1) including a semiconductor layer (3), a connection pad (7) below the semiconductor layer (3) opposite the upper surface (20), a via opening (9) with a sidewall (19) in the semiconductor layer (3) above the connection pad (7), and an electrically conductive via layer (6) arranged at the sidewall (19) and in contact with the connection pad (7). An electrically conductive upper via layer (26) is arranged at the sidewall (19) on or above the via layer (6) and is electrically conductively connected to the connection pad (7).

    摘要翻译: 衬底的半导体器件包括一个基片(1),其具有上表面(20),所述(1)包括一半导体层(3),连接焊盘与半导体层(7)(3)下面相对的上表面(20) 中,经由开口(9)与连接焊盘(7)上方的半导体层(3)的侧壁(19)中,在经由层导电(6)在所述侧壁(19)布置并且在与连接接触 垫(7)。 导电上层通路层(26)在所述侧壁(19)上或上方设置在所述通孔层(6)和导电性地电连接到连接焊盘(7)。