摘要:
In accordance with the invention a fine-line semiconductor device is fabricated by the steps of applying a layer of resist (11) to the surface of a semiconductor substrate (10), opening a line in the resist with negative sloping side walls, applying to the patterned structure a layer of material (16) which conforms to both horizontal and vertical surfaces including the negative sloping sidewalls, thereby reducing the width of the opened line; and etching away the horizontal portions of the conforming layer using the overhanging portion of the conforming layer as a mask. The result is an exposed line of semiconductor (19) having a width reduced from the original width by more than twice the thickness of the conforming layer. The invention is illustrated by the fabrication of a gallium arsenide MESFET transistor with a 0.4 micron gate length. Gate lengths so small as 0.1 micron have been made using this technique.
摘要:
In accordance with the invention, gallium-containing layers are grown by molecular beam processes using as an arsenic precursor a compound of the dialkylaminoarsenic family (DAAAS) such as tris-dimethylamino arsenic (DMAAs). In contrast to conventional arsenic sources, DAAAs act as carbon "getters". When DAAAs are used as an arsenic source, the DAAAs getter carbon impurities from the gallium source. Thus, for example, DAAAs can be used as an arsenic source in combination with TMG as a gallium source to selectively grow high purity or n-type layers of gallium arsenide at low temperatures below 600°C. In addition DMAAs has been found to be an excellent cleaning agent for gallium arsenide materials.
摘要:
In accordance with the invention a fine-line semiconductor device is fabricated by the steps of applying a layer of resist (11) to the surface of a semiconductor substrate (10), opening a line in the resist with negative sloping side walls, applying to the patterned structure a layer of material (16) which conforms to both horizontal and vertical surfaces including the negative sloping sidewalls, thereby reducing the width of the opened line; and etching away the horizontal portions of the conforming layer using the overhanging portion of the conforming layer as a mask. The result is an exposed line of semiconductor (19) having a width reduced from the original width by more than twice the thickness of the conforming layer. The invention is illustrated by the fabrication of a gallium arsenide MESFET transistor with a 0.4 micron gate length. Gate lengths so small as 0.1 micron have been made using this technique.
摘要:
In accordance with the invention, gallium-containing layers are grown by molecular beam processes using as an arsenic precursor a compound of the dialkylaminoarsenic family (DAAAS) such as tris-dimethylamino arsenic (DMAAs). In contrast to conventional arsenic sources, DAAAs act as carbon "getters". When DAAAs are used as an arsenic source, the DAAAs getter carbon impurities from the gallium source. Thus, for example, DAAAs can be used as an arsenic source in combination with TMG as a gallium source to selectively grow high purity or n-type layers of gallium arsenide at low temperatures below 600°C. In addition DMAAs has been found to be an excellent cleaning agent for gallium arsenide materials.