摘要:
A lateral field effected transistor of SiC for high switching frequencies comprises a source region layer (5) and a drain region layer (6) laterally spaced and highly doped n-type, an n-type channel layer (4) extending laterally and interconnecting the source region layer and the drain region layer for conducting a current between these layers in the on-state of the transistor, and a gate electrode (9) arranged to control the channel layer to be conducting or blocking through varying the potential applied to the gate electrode. A highly doped p-type base layer (12) is arranged next to the channel layer at least partially overlapping the gate electrode and being at a lateral distance to the drain region layer. The base layer is shorted to the source region layer.
摘要:
The invention relates to a method for selective etching of SiC, the etching being carried out by applying a positive potential to a layer (3; 8) of p-type SiC being in contact with an etching solution containing fluorine ions and having an oxidising effect on SiC. The invention also relates to a method for producing a SiC micro structure having free hanging parts (i.e. diaphragm, cantilever or beam) on a SiC-substrate, a method for producing a MEMS device of SiC having a free hanging structure, and a method for producing a piezo-resistive pressure sensor comprising the step of applying a positive potential to a layer (8) of p-type SiC being in contact with an etching solution containing fluorine ions and having an oxidising effect on SiC.
摘要:
A semiconductor device comprises at least one first semiconductor layer (1-4) and a second layer (8) applied on at least a surface portion of the first layer for protecting the device. The protecting layer is of a second material having a larger energy gap between the valence band and the conduction band than a first material forming said first layer. The second material has at least in one portion of said protecting layer a nano-crystalline and amorphous structure by being composed of crystalline grains with a size less than 100 nm and a resistivity at room temperature exceeding 1x1010 Φcm.
摘要:
A field effect transistor of SiC for high temperature application has the source region layer (4), the drain region layer (5) and the channel region layer (6, 7) vertically separated from a front surface (14), where a gate electrode (12) is arranged, for reducing the electric field at said surface in operation of the transistor and in the case of operation as a gas sensor permitting all electrodes except for the gate electrode to be protected from the atmosphere.