公开(公告)号：EP1428257A2

公开(公告)日：2004-06-16

申请号：EP02768487.7

申请日：2002-08-12

申请人： DOW CORNING CORPORATION

发明人： LUTZ, Michael, A.

IPC分类号： H01L23/485

CPC分类号： H01L24/12 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/02125 ,  H01L2224/0401 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2224/13609 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00012 ,  H01L2924/00

摘要： An apparatus is disclosed including an electrical conductor and an electrically conductive, compliant bump formed on the electrical conductor. The compliant bump includes an electrically conductive, solderable capping layer and an electrically conductive, compliant body positioned between the solderable capping layer and the electrical conductor . The compliant body electrically couples the solderable capping layer to the electrical conductor. The electrical conductor may be, for example, an input/output (I/0) pad of the apparatus, and the compliant bump may form an electrical terminal of the apparatus. The compliant body forms a mechanically flexible, electrically conductive path between the solderable capping layer and the electrical conductor. The compliant bump deforms elastically when subjected to a force exerted between the solderable capping layer and the electrical conductor, allowing the compliant bump to form a highly reliable connection between the apparatus and an external element. Several embodiments of the compliant bump, and methods for forming the compliant bump, are presented.

公开(公告)号：EP1428257B1

公开(公告)日：2008-01-09

申请号：EP02768487.7

申请日：2002-08-12

申请人： Dow Corning Corporation

发明人： LUTZ, Michael, A.

IPC分类号： H01L23/485 ,  H01L21/60 ,  H01L23/498

CPC分类号： H01L24/12 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/02125 ,  H01L2224/0401 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2224/13609 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00012 ,  H01L2924/00

摘要： An apparatus is disclosed including an electrical conductor and an electrically conductive, compliant bump formed on the electrical conductor. The compliant bump includes an electrically conductive, solderable capping layer and an electrically conductive, compliant body positioned between the solderable capping layer and the electrical conductor . The compliant body electrically couples the solderable capping layer to the electrical conductor. The electrical conductor may be, for example, an input/output (I/0) pad of the apparatus, and the compliant bump may form an electrical terminal of the apparatus. The compliant body forms a mechanically flexible, electrically conductive path between the solderable capping layer and the electrical conductor. The compliant bump deforms elastically when subjected to a force exerted between the solderable capping layer and the electrical conductor, allowing the compliant bump to form a highly reliable connection between the apparatus and an external element. Several embodiments of the compliant bump, and methods for forming the compliant bump, are presented.

公开(公告)号：EP1428256B1

公开(公告)日：2006-03-22

申请号：EP02761321.5

申请日：2002-08-12

申请人： DOW CORNING CORPORATION

发明人： LUTZ, Michael, A.

IPC分类号： H01L23/48

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00

摘要： A semiconductor device (e.g., a chip scale package or CSP) is described including multiple input/output (I/O) pads arranged on a surface of a semiconductor substrate, a compliant dielectric layer, an outer dielectric layer, and multiple electrically conductive, compliant interconnect bumps (i.e., compliant bumps). The compliant bumps may form electrical terminals of the semiconductor device. The compliant dielectric layer is positioned between the outer dielectric layer and the surface of the semiconductor substrate. The outer dielectric layer and the compliant dielectric both have multiple openings (i.e., holes) extending therethrough. Each of the compliant bumps is formed upon a different one of the I/O pads, and extends through a different one of the openings in the first compliant dielectric layer and the outer dielectric layer. Each of the compliant bumps includes an electrically conductive, compliant body, and an electrically conductive, solderable conductor element. The compliant bodies form mechanically flexible, eletrically conductive paths between the solderable conductor elements and the corresponding I/O pads. The solderable conductor elements are solder wettable. Several methods for forming the semiconductor device are described. An apparatus including the semiconductor device is also described, as is a method for forming the apparatus.

公开(公告)号：EP1428256A2

公开(公告)日：2004-06-16

申请号：EP02761321.5

申请日：2002-08-12

申请人： Dow Corning Corporation

发明人： LUTZ, Michael, A.

IPC分类号： H01L23/48

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00

摘要： A semiconductor device (e.g., a chip scale package or CSP) is described including multiple input/output (I/O) pads arranged on a surface of a semiconductor substrate, a compliant dielectric layer, an outer dielectric layer, and multiple electrically conductive, compliant interconnect bumps (i.e., compliant bumps). The compliant bumps may form electrical terminals of the semiconductor device. The compliant dielectric layer is positioned between the outer dielectric layer and the surface of the semiconductor substrate. The outer dielectric layer and the compliant dielectric both have multiple openings (i.e., holes) extending therethrough. Each of the compliant bumps is formed upon a different one of the I/O pads, and extends through a different one of the openings in the first compliant dielectric layer and the outer dielectric layer. Each of the compliant bumps includes an electrically conductive, compliant body, and an electrically conductive, solderable conductor element. The compliant bodies form mechanically flexible, eletrically conductive paths between the solderable conductor elements and the corresponding I/O pads. The solderable conductor elements are solder wettable. Several methods for forming the semiconductor device are described. An apparatus including the semiconductor device is also described, as is a method for forming the apparatus.