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    Methods for operating semiconductor memory devices and semiconductor memory devices
    1.
    发明公开
    Methods for operating semiconductor memory devices and semiconductor memory devices 有权
    Halbleiterspeicheranordnungen und ihre Betriebsverfahren

    公开(公告)号：EP1050882A2

    公开(公告)日：2000-11-08

    申请号：EP00303775.1

    申请日：2000-05-05

    申请人： FUJITSU LIMITED

    发明人： Suzuki, Takaaki, c/o Fujitsu Limited ,  Uchida, Toshiya, c/o Fujitsu Limited ,  Sato, Kotoku, c/o Fujitsu Limited ,  Yagishita, Yoshimasa, c/o Fujitsu Limited

    IPC分类号： G11C5/06

    CPC分类号： G11C11/406 ,  G11C5/066 ,  G11C11/40603 ,  G11C11/40611

    摘要： A semiconductor memory device having a plurality of operating modes for controlling an internal circuit comprises a command controlling circuit which accepts signals supplied to predetermined terminals as commands at a plurality of times. The number of operating modes is sequentially narrowed down based on each command and the internal circuit is controlled according to the narrowed operating modes. One such command controlling circuit comprises a plurality of accepting circuits (94a). Each of the accepting circuits (94a) respectively accepts signals, supplied at a plurality of times, each time. In other words, in accordance with the timing of the signal supplement, a different accepting circuit (94a) is respectively operated and the internal circuit is controlled. Accordingly, a command controlling circuit may be readily designed even in the semiconductor memory device having a complicated command combination. Consequently, it is able to facilitate the verification of the design.
    Since the information necessary for determining an operating mode is accepted at a plurality of times, the number of terminals necessary for inputting commands can be reduced. In particular, in case of inputting commands at a dedicated terminal, its input pads, input circuits, or the like are no longer be required so that the chip size can be reduced. The reduction is accomplished by reducing the number of terminals, which gives limits to the package size.

    摘要翻译： 具有用于控制内部电路的多个操作模式的半导体存储器件包括命令控制电路，其接受作为命令多次提供给预定端子的信号。 基于每个命令，操作模式的数量依次变窄，并且根据变窄的操作模式来控制内部电路。 一个这样的指令控制电路包括多个接受电路（94a）。 每个接受电路（94a）分别接收每次多次提供的信号。 换句话说，根据信号补充的定时，分别操作不同的接受电路（94a），并且控制内部电路。 因此，即使在具有复杂的指令组合的半导体存储器件中，命令控制电路也可以容易地设计。 因此，它能够方便验证设计。 由于多次接受确定操作模式所需的信息，因此可以减少输入命令所需的终端数量。 特别地，在专用端子输入命令的情况下，不再需要其输入焊盘，输入电路等，从而可以减小芯片尺寸。 通过减少端子数量来实现减少，这限制了封装尺寸。