公开(公告)号：EP1499906A1

公开(公告)日：2005-01-26

申请号：EP03721656.1

申请日：2003-04-14

申请人： Freescale Semiconductor, Inc.

发明人： TKACIK, Thomas ,  SPITTAL, John, E., Jr. ,  LUTZ, Jonathan ,  CASE, Lawrence ,  HARDY, Douglas ,  REDMAN, Mark ,  SCHMIDT, Gregory ,  TUGEBNERG, Steven ,  FITZSIMMONS, Michael, D. ,  CARDER, Darrell, L.

IPC分类号： G01R31/3185 ,  G06F1/00

CPC分类号： G06F21/75 ,  G01R31/31719 ,  G01R31/318516 ,  G01R31/318533 ,  G01R31/318544

摘要： A processor, scan controller, and method for protecting sensitive information from electronic hacking is disclosed. To maintain the security of the sensitive data present in a processor, the scan controller denies access to the scan chain until data is cleared from scan-observable portions of the processor, then clears the scan chain again prior to exiting test mode and resuming normal operation. Clearing or otherwise modifying data stored in the scan-observable portions of a processor when transitioning to and/or from a test mode will prevent unauthorized personnel from simply shifting secure data out of the scan chain, and from pre-loading data into the scan chain prior to normal operation in an attempt to set sensitive state information.

公开(公告)号：EP1499906B1

公开(公告)日：2006-01-04

申请号：EP03721656.1

申请日：2003-04-14

申请人： Freescale Semiconductor, Inc.

发明人： TKACIK, Thomas ,  SPITTAL, John, E., Jr. ,  LUTZ, Jonathan ,  CASE, Lawrence ,  HARDY, Douglas ,  REDMAN, Mark ,  SCHMIDT, Gregory ,  TUGENBERG, Steven ,  FITZSIMMONS, Michael, D. ,  CARDER, Darrell, L.

IPC分类号： G01R31/3185 ,  G06F1/00

CPC分类号： G06F21/75 ,  G01R31/31719 ,  G01R31/318516 ,  G01R31/318533 ,  G01R31/318544

摘要： A processor, scan controller, and method for protecting sensitive information from electronic hacking is disclosed. To maintain the security of the sensitive data present in a processor, the scan controller denies access to the scan chain until data is cleared from scan-observable portions of the processor, then clears the scan chain again prior to exiting test mode and resuming normal operation. Clearing or otherwise modifying data stored in the scan-observable portions of a processor when transitioning to and/or from a test mode will prevent unauthorized personnel from simply shifting secure data out of the scan chain, and from pre-loading data into the scan chain prior to normal operation in an attempt to set sensitive state information.