Encoding and decoding system for video signal processing
    3.
    发明公开
    Encoding and decoding system for video signal processing 失效
    视频信号处理编码和解码系统

    公开(公告)号:EP0133442A3

    公开(公告)日:1987-01-07

    申请号:EP84100187

    申请日:1984-01-10

    申请人: HITACHI, LTD.

    IPC分类号: H04R01/46

    CPC分类号: H04N1/4175

    摘要: An encoding/decoding system to be connected to an external microcomputer, video memory, photoelectric reader or printer comprises an address generator (2400) for generating an address to access the video memory word by word, a transition point detector (2600) for parallelly processing a video signal word by word to detect a color information transition point address, an execution unit (23001 for calculating an address difference from two color information transition point addresses or the color information transition point address based on a difference between two color information transition point addresses, an encod- in g decoding table (2500) for converting an address difference to a code word and converting a code word to an address difference, and a decoded video signal generator (2700) for parallelly reproducing a video signal based on the address difference.

    Encoding and decoding system for video signal processing
    4.
    发明公开
    Encoding and decoding system for video signal processing 失效
    编码和解码系统的视频信号处理。

    公开(公告)号:EP0133442A2

    公开(公告)日:1985-02-27

    申请号:EP84100187.8

    申请日:1984-01-10

    申请人: HITACHI, LTD.

    IPC分类号: H04N1/46

    CPC分类号: H04N1/4175

    摘要: An encoding/decoding system to be connected to an external microcomputer, video memory, photoelectric reader or printer comprises an address generator (2400) for generating an address to access the video memory word by word, a transition point detector (2600) for parallelly processing a video signal word by word to detect a color information transition point address, an execution unit (23001 for calculating an address difference from two color information transition point addresses or the color information transition point address based on a difference between two color information transition point addresses, an encod- in g decoding table (2500) for converting an address difference to a code word and converting a code word to an address difference, and a decoded video signal generator (2700) for parallelly reproducing a video signal based on the address difference.

    Power storage device and method of measuring voltage of storage battery
    5.
    发明公开
    Power storage device and method of measuring voltage of storage battery 有权
    Energiespeichervorrichtung und Verfahren zur Spannungsmessung an Speicherbatterie

    公开(公告)号:EP1122854A2

    公开(公告)日:2001-08-08

    申请号:EP01102725.7

    申请日:2001-02-06

    申请人: Hitachi, Ltd.

    IPC分类号: H02J7/00

    摘要: A power storage device has a plurality of series-connected storage battery units (101), battery circuits (102) associated with the storage battery units to control or monitor the storage battery units, respectively; a main circuit (104) of a potential level different from that of the battery circuits; and a potential level changing circuits (103) connecting the battery circuit to the main circuit. The power storage unit is small in construction and operates at a low power consumption in a high control accuracy.

    摘要翻译: 蓄电装置具有多个串联连接的蓄电池单元(101),与蓄电池单元相关联的电池电路(102),分别控制或监视蓄电池单元; 与电池电路​​的电位不同的主电路(104); 以及将电池电路连接到主电路的电位电平改变电路(103)。 蓄电单元结构小巧,控制精度高,功耗低。

    Image signal processing apparatus
    7.
    发明公开
    Image signal processing apparatus 失效
    Bildsignalverarbeitungsgerät。

    公开(公告)号:EP0565861A1

    公开(公告)日:1993-10-20

    申请号:EP93103844.2

    申请日:1993-03-10

    申请人: HITACHI, LTD.

    IPC分类号: H04N1/40

    CPC分类号: H04N1/401

    摘要: An image signal processing apparatus to realize signal processing system and apparatus constitution, where an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor is obtained in circuit constitution of small scale with high picture quality. In order to solve the problems, data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is made b + f + j ≦ 8 per one pixel. Or error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is made b + f + j' ≦ 8 , data width per one pixel being made j' = j/N . Image signal processing is realized in this constitution, thereby data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying accuracy of signal processing sufficiently and having high picture quality can be obtained. For example, when a circuit is constituted by LSI, the memory section can be easily mounted on the same LSI. A memory required in the image signal processing can be made 8 bits per one pixel and a cheap memory constitution can be utilized.

    摘要翻译: 一种用于实现信号处理系统和装置结构的图像信号处理装置,其中使用诸如CCD或接触式图像传感器的光电转换元件输入的图像信号以具有高图像质量的小规模电路结构获得。 为了解决这个问题,在一个像素中,b + f + j = 8,在阴影校正器,MTF校正器和误差扩散电路中所参考的信号的数据宽度。 或者在误差扩散电路中通常由多个像素(N个像素)拥有的误差分量为b + f + j',8,每个像素的数据宽度为j'= j / N。 在该结构中实现图像信号处理,从而减少了各信号处理中所涉及的信号的数据宽度,并且可以获得满足信号处理精度并且具有高图像质量的图像信号。 例如,当电路由LSI构成时,可以容易地将存储部安装在同一LSI上。 图像信号处理所需的存储器可以使每个像素8位,并且可以利用便宜的存储器结构。

    Communication interface apparatus
    8.
    发明公开
    Communication interface apparatus 审中-公开
    Kommunikationsschnittstellenanordnung

    公开(公告)号:EP1069754A3

    公开(公告)日:2004-12-22

    申请号:EP00104551.7

    申请日:2000-03-13

    申请人: Hitachi, Ltd.

    IPC分类号: H04M19/08

    CPC分类号: H04M19/08

    摘要: A communication interface apparatus is provided for extending a communication available distance, suppressing the influence of a power receiving circuit on a transmitter/receiver circuit (3), and reducing the cost. The transmitter/receiver circuit is configured in a balanced circuit to enhance the driving capability, so that a sufficient amplitude can be ensured even if a power receiving circuit (8) provides a low received voltage. A low pass filter (LPF) is added in front of the power receiving circuit to eliminate electrical interference between the power receiving circuit and the transmitter/receiver circuit, resulting in improved input impedance frequency characteristics of the power receiving circuit. The LPF is connected to both plus and minus terminals of the power receiving circuit, and bypass capacitor is shared by plus and minus inputs, thereby providing well balanced operation characteristic. A Zener diode may be utilized in the LPF to form a two-stage stabilizing circuit, so that an IC-based voltage regulator can be used even with a high input voltage provided from if the power receiving circuit.