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公开(公告)号：EP0327122A3
公开(公告)日：1992-09-02
申请号：EP89101952.3
申请日：1989-02-03
申请人： HITACHI, LTD.
IPC分类号： H01L27/06 , H01L27/082
CPC分类号： H01L29/66318 , H01L21/8226 , H01L21/8252 , H01L27/0605
摘要： A complementary semiconductor device is disclosed which comprises a substrate (1) and four layer structure (2 ... 6) of pnpn provided on the substrate wherein the first three layers (2, 3, 5) constitute a pnp-type bipolar transistor and the second to fourth layers (3, 5, 6) constitute an npn-type bipolar transistor. According to the present invention, the pnp- and npn-type transistors can be produced by crystal growth of one time and thus production steps are simple and yield is remarkably improved.
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公开(公告)号：EP0322718A3
公开(公告)日：1990-03-21
申请号：EP88121317.7
申请日：1988-12-20
申请人： HITACHI, LTD.
发明人： Mizuta, Hiroshi , Tanoue, Tomonori , Kusano, Chushirou Sankopo Higashitokorozawa , Takahashi, Susumu
CPC分类号： B82Y10/00 , H01L29/155 , H01L29/882
摘要： A resonant tunneling device comprises a superlattice layer (11) which includes an interlaminated structure of three semiconductor layers (5, 6, 7; 26, 24, 22) each having a narrow energy bandgap and serving as a quantum well layer and four semiconductor layers (1, 2, 3, 4; 27, 25, 23, 21) each having a wide energy bandgap and serving as a barrier layer and in which three quantum levels are formed in the quantum well layers. A resonant tunneling phenomenon produced between the quantum levels provide peak current values which are substantially equal to each other, peak voltages which can be set independently from each other, and peak-to-valley (P/V) ratios which are high, thereby realizing the resonant tunneling device which has an excellent performance as a three state logic element for a logic circuit. By increasing the number of quantum well layers and the number of barrier layers, a four or more state logic element for a logic circuit can be realized.
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公开(公告)号：EP0322718B1
公开(公告)日：1996-09-18
申请号：EP88121317.7
申请日：1988-12-20
申请人： HITACHI, LTD.
发明人： Mizuta, Hiroshi , Tanoue, Tomonori , Kusano, Chushirou Sankopo Higashitokorozawa , Takahashi, Susumu
CPC分类号： B82Y10/00 , H01L29/155 , H01L29/882
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公开(公告)号：EP0364987B1
公开(公告)日：1996-05-22
申请号：EP89119349.2
申请日：1989-10-18
申请人： HITACHI, LTD.
CPC分类号： B82Y10/00 , G02F3/028 , G06N3/0635 , G06N3/0675 , G11C11/56 , G11C13/04 , G11C2211/5614
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公开(公告)号：EP0364987A3
公开(公告)日：1991-09-25
申请号：EP89119349.2
申请日：1989-10-18
申请人： HITACHI, LTD.
摘要： A semiconductor device is disclosed, which includes a multiple negative differential resistance element (1) having negative differential resistance characteristics at at least two places in the current-voltage characteristics, and which is suitable for constructing a neural network having a high density integration and a high reliability.
摘要翻译： 公开了一种半导体器件，其包括在电流 - 电压特性中的至少两个位置处具有负差分电阻特性的多负差分电阻元件（1），并且该半导体器件适用于构建具有高密度集成的神经网络和 高可靠性。
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公开(公告)号：EP0305121B1
公开(公告)日：1994-03-23
申请号：EP88307704.2
申请日：1988-08-19
申请人： HITACHI, LTD.
发明人： Mitani, Katsuhiko , Tanoue, Tomonori , Kusano, Chushiro , Kobayashi, Masayoshi , Takahashi, Susumu
CPC分类号： H01L29/66318 , H01L29/1004 , H01L29/7371 , Y10S148/01 , Y10S148/072 , Y10S148/084
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公开(公告)号：EP0305121A3
公开(公告)日：1990-03-28
申请号：EP88307704.2
申请日：1988-08-19
申请人： HITACHI, LTD.
发明人： Mitani, Katsuhiko , Tanoue, Tomonori , Kusano, Chushiro , Kobayashi, Masayoshi , Takahashi, Susumu
CPC分类号： H01L29/66318 , H01L29/1004 , H01L29/7371 , Y10S148/01 , Y10S148/072 , Y10S148/084
摘要： A semiconductor device including a heterojunction bipolar transistor in which the front surface of a base layer (13) and the surface of an emitter-base junction between an emitter layer (14,15) and the base layer (13) are covered with a high-resistivity layer (17) of compound semiconductor containing at least one constituent element common to the emitter layer (14,15) and the base layer (13). The transistor is formed by the emitter (14,15) and base layer (13) together with a collector layer (12) on a semiconductor substrate (11). The base layer (13) extends to a base contact layer (113) with an electrode (111). In this way, it is possible to overcome to a significant extent the lowering of a D.C. current gain (the emitter size effect) attributed to the reduction of an emitter size attendant upon the microfabrication of a device.
摘要翻译： 一种包括异质结双极型晶体管的半导体器件，其中基极层（13）的前表面和发射极层（14,15）与基极层（13）之间的发射极 - 基极结的表面被覆盖有高 （14,15）和基底层（13）共有的至少一个构成元素的化合物半导体的电阻 - 电阻层（17）。 晶体管由发射极（14,15）和基极层（13）与半导体衬底（11）上的集电极层（12）一起形成。 基层（13）延伸到具有电极（111）的基极接触层（113）。 以这种方式，有可能在很大程度上克服归因于装置的微制造伴随的发射器尺寸的减小而引起的直流电流增益（发射器尺寸效应）的降低。
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公开(公告)号：EP0327122A2
公开(公告)日：1989-08-09
申请号：EP89101952.3
申请日：1989-02-03
申请人： HITACHI, LTD.
IPC分类号： H01L27/06 , H01L27/082
CPC分类号： H01L29/66318 , H01L21/8226 , H01L21/8252 , H01L27/0605
摘要： A complementary semiconductor device is disclosed which comprises a substrate (1) and four layer structure (2 ... 6) of pnpn provided on the substrate wherein the first three layers (2, 3, 5) constitute a pnp-type bipolar transistor and the second to fourth layers (3, 5, 6) constitute an npn-type bipolar transistor. According to the present invention, the pnp- and npn-type transistors can be produced by crystal growth of one time and thus production steps are simple and yield is remarkably improved.
摘要翻译： 公开了一种补充半导体器件，其包括衬底（1）和设置在衬底上的pnpn的四层结构（2 ... 6），其中前三层（2,3,5）构成pnp型双极晶体管， 第二至第四层（3,5,6）构成npn型双极晶体管。 根据本发明，pnp和npn型晶体管可以通过晶体生长一次制造，因此制造步骤简单，产率显着提高。
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公开(公告)号：EP0661561A2
公开(公告)日：1995-07-05
申请号：EP94309625.5
申请日：1994-12-21
申请人： HITACHI, LTD.
CPC分类号： G02B6/125 , G02B6/12004 , G02B6/122 , G02B6/132
摘要： An integrated optical waveguide device includes a substrate (1), and an optical waveguide which is formed in the form of projection or is formed in a trench formed in the substrate. Each optical waveguide has a first optical area (2) made of a first optical material and a second optical area (3) which is made of a second optical material and is surrounded by the first optical area. The optical waveguides are arranged on both side faces of the projection or trench.
摘要翻译： 本发明提供一种集成型光波导装置，其包括基板（1）和形成为突起状的光波导路，或者在形成于基板的槽中形成的光波导路。 每个光波导具有由第一光学材料制成的第一光学区域（2）和由第二光学材料制成并由第一光学区域围绕的第二光学区域（3）。 光波导布置在突起或沟槽的两个侧面上。
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公开(公告)号：EP0364987A2
公开(公告)日：1990-04-25
申请号：EP89119349.2
申请日：1989-10-18
申请人： HITACHI, LTD.
CPC分类号： B82Y10/00 , G02F3/028 , G06N3/0635 , G06N3/0675 , G11C11/56 , G11C13/04 , G11C2211/5614
摘要： A semiconductor device is disclosed, which includes a multiple negative differential resistance element (1) having negative differential resistance characteristics at at least two places in the current-voltage characteristics, and which is suitable for constructing a neural network having a high density integration and a high reliability.
摘要翻译： 公开了一种半导体器件，其包括在电流 - 电压特性中的至少两个位置处具有负的差分电阻特性的多个负的差分电阻元件（1），并且适用于构建具有高密度积分的神经网络和 高可靠性。
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