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15 条记录 (耗时 0.013 秒)

    Semiconductor memory device and manufacturing method thereof
    1.
    发明公开
    Semiconductor memory device and manufacturing method thereof 有权
    半导体存储器件及其制造方法

    公开(公告)号：EP0908954A3

    公开(公告)日：1999-07-14

    申请号：EP98118164.7

    申请日：1998-09-24

    申请人： Hitachi, Ltd.

    发明人： Sunami, Hideo ,  Itoh, Kiyoo ,  Shimada, Toshikazu ,  Nakazato, Kazuo ,  Mizuta, Hiroshi

    IPC分类号： H01L27/108 ,  H01L21/8242

    CPC分类号： B82Y10/00 ,  H01L27/108

    摘要： A high speed/large capacity DRAM (Dynamic Random Access Memory) is generally refreshed each 0.1 sec because it loses information stored therein due to a leakage current. The DRAM also loses information stored therein upon cutoff of a power source. Meanwhile, a nonvolatile ROM (Read-only Memory) cannot be configured as a high speed/large capacity memory. A semiconductor memory device of the present invention realizes nonvolatile characteristic by shielding a drain functioning as a memory node from a leakage current by a tunnel insulator, and also realizes stable and high speed operation by adding a transistor for reading to a memory cell.

    摘要翻译： 高速/大容量DRAM（动态随机存取存储器）通常每0.1秒刷新一次，因为它由于漏电流而丢失存储在其中的信息。 在切断电源时，DRAM也丢失存储在其中的信息。 同时，非易失性ROM（只读存储器）不能配置为高速/大容量存储器。 本发明的半导体存储器件通过屏蔽作为存储器节点的漏极免受隧道绝缘体泄漏电流的影响而实现非易失性特性，并且通过向存储器单元添加用于读取的晶体管来实现稳定且高速的操作。

    Nanotube transistor device
    4.
    发明公开
    Nanotube transistor device 审中-公开
    Nanoröhren三极管

    公开(公告)号：EP1508926A1

    公开(公告)日：2005-02-23

    申请号：EP03255119.4

    申请日：2003-08-19

    申请人： Hitachi, Ltd.

    发明人： Kim, Byong Man ,  Nakazato, Kazuo ,  Mizuta, Hiroshi

    IPC分类号： H01L51/30

    CPC分类号： H01L51/0048 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/18 ,  H01L51/002 ,  H01L51/0508 ,  H01L51/0545

    摘要： A transistor device comprising source and drain regions (S, D), a nanotube structure (2, 3) providing a path for electrical charge carriers between the source and drain regions, and a gate region (4). The nanotube structure has its conduction band structure locally modified in the gate region, e.g. by doping, for controlling the passage of the charge carriers in the path. The device can be used as a flash memory or as a memory element in a DRAM.

    摘要翻译： 一种晶体管器件，包括源极和漏极区域（S，D），为源极和漏极区域之间的电荷载流子提供路径的纳米管结构（2,3）和栅极区域（4）。 纳米管结构具有在栅极区域局部修饰的导带结构。 通过掺杂，用于控制路径中的载流子的通过。 该装置可以用作DRAM中的闪速存储器或存储元件。

    Resonant tunneling device
    5.
    发明公开
    Resonant tunneling device 失效
    Annenung mit resonanceem Tunneleffekt。

    公开(公告)号：EP0322718A2

    公开(公告)日：1989-07-05

    申请号：EP88121317.7

    申请日：1988-12-20

    申请人： HITACHI, LTD.

    发明人： Mizuta, Hiroshi ,  Tanoue, Tomonori ,  Kusano, Chushirou Sankopo Higashitokorozawa ,  Takahashi, Susumu

    IPC分类号： H01L29/88 ,  H01L29/12

    CPC分类号： B82Y10/00 ,  H01L29/155 ,  H01L29/882

    摘要： A resonant tunneling device comprises a superlattice layer (11) which includes an interlaminated structure of three semiconductor layers (5, 6, 7; 26, 24, 22) each having a narrow energy bandgap and serving as a quantum well layer and four semiconductor layers (1, 2, 3, 4; 27, 25, 23, 21) each having a wide energy bandgap and serving as a barrier layer and in which three quantum levels are formed in the quantum well layers. A resonant tunneling phenomenon produced between the quantum levels provide peak current values which are substantially equal to each other, peak voltages which can be set independently from each other, and peak-to-valley (P/V) ratios which are high, thereby realizing the resonant tunneling device which has an excellent performance as a three state logic element for a logic circuit. By increasing the number of quantum well layers and the number of barrier layers, a four or more state logic element for a logic circuit can be realized.

    摘要翻译： 谐振隧穿装置包括超晶格层（11），其包括三个半导体层（5,6,7; 26,24,22）的层间结构，每个半导体层具有窄能带隙并且用作量子阱层和四个半导体层 （1,2,3,4; 27,25,23,21），其各自具有宽能带隙并且用作阻挡层，并且其中在量子阱层中形成三个量子水平。 在量子电平之间产生的谐振隧穿现象提供了彼此基本相等的峰值电流值，可以彼此独立设置的峰值电压和高峰值 - 谷值（P / V）比，从而实现 该谐振隧穿装置作为用于逻辑电路的三态逻辑元件具有优异的性能。 通过增加量子阱层的数量和势垒层的数量，可以实现用于逻辑电路的四个或更多个状态逻辑元件。

    Improved memory device
    7.
    发明公开
    Improved memory device 有权
    Verbesserte Speicheranordnung

    公开(公告)号：EP1420413A1

    公开(公告)日：2004-05-19

    申请号：EP02257827.2

    申请日：2002-11-12

    申请人： Hitachi, Ltd.

    发明人： Nakazato, Kazuo ,  Furuta, Yoshikazu ,  Mizuta, Hiroshi

    IPC分类号： G11C11/39

    CPC分类号： G11C11/39 ,  G11C5/142

    摘要： A SRAM includes a substrate with an array of memory cells (M ij ) each comprising a memory node (N) and a NDR device (NDR) operable in first mode with a negative differential resistance characteristic which causes first and second different memory states written to the cell to be maintained at the node, and in a second mode with a p-n junction characteristic i.e. without the negative differential resistance. Peripheral circuitry (13,14) on the same substrate is operable to read data from and write data to the cells. Data is written to a selected cell by changing the NDR device of the selected cell from its first mode to the second mode i.e. without NDR, setting the memory state of the node whilst the NDR is in said first mode and thereafter changing the NDR to the first mode to maintain the set memory state at the node. The peripheral circuitry is configured so that when the NDR of one of the cells is changed into the second mode for the writing of data, none of the other cells have their NDRs changed into the second mode, so as to maintain the memory states of the unselected nodes thereof during the writing of the data to the selected cell.

    摘要翻译： SRAM包括具有存储单元阵列（Mij）的衬底，每个存储单元包括存储器节点（N）和NDR器件（NDR），其以第一模式工作，具有负的差分电阻特性，其导致写入到第一和第二不同存储器状态 电池被保持在节点处，并且在具有pn结特性的第二模式中，即没有负的差分电阻。 同一衬底上的外围电路（13,14）可操作以从单元读取数据并将数据写入单元。 通过将所选择的单元的NDR设备从其第一模式改变为第二模式（即，不具有NDR）将数据写入所选单元，在NDR处于所述第一模式期间设置节点的存储器状态，然后将NDR更改为 第一种模式来保持节点处的设置内存状态。 外围电路被配置为使得当一个小区的NDR被改变为用于写入数据的第二模式时，其他小区都不将其NDR改变为第二模式，以便维持 在将数据写入所选择的单元期间，其未选择的节点。

    Resonant tunneling device
    8.
    发明公开
    Resonant tunneling device 失效
    共振隧道装置

    公开(公告)号：EP0322718A3

    公开(公告)日：1990-03-21

    申请号：EP88121317.7

    申请日：1988-12-20

    申请人： HITACHI, LTD.

    发明人： Mizuta, Hiroshi ,  Tanoue, Tomonori ,  Kusano, Chushirou Sankopo Higashitokorozawa ,  Takahashi, Susumu

    IPC分类号： H01L29/88 ,  H01L29/12

    CPC分类号： B82Y10/00 ,  H01L29/155 ,  H01L29/882

    摘要： A resonant tunneling device comprises a superlattice layer (11) which includes an interlaminated structure of three semiconductor layers (5, 6, 7; 26, 24, 22) each having a narrow energy bandgap and serving as a quantum well layer and four semiconductor layers (1, 2, 3, 4; 27, 25, 23, 21) each having a wide energy bandgap and serving as a barrier layer and in which three quantum levels are formed in the quantum well layers. A resonant tunneling phenomenon produced between the quantum levels provide peak current values which are substantially equal to each other, peak voltages which can be set independently from each other, and peak-to-valley (P/V) ratios which are high, thereby realizing the resonant tunneling device which has an excellent performance as a three state logic element for a logic circuit. By increasing the number of quantum well layers and the number of barrier layers, a four or more state logic element for a logic circuit can be realized.

    Single-photon source
    9.
    发明公开
    Single-photon source 有权
    Einzelphotonenquelle

    公开(公告)号：EP1503328A1

    公开(公告)日：2005-02-02

    申请号：EP03254736.6

    申请日：2003-07-29

    申请人： Hitachi, Ltd.

    发明人： Williams, David Arfon ,  Mizuta, Hiroshi

    IPC分类号： G06N1/00 ,  G02B6/12 ,  H04L9/08

    CPC分类号： G06N99/002 ,  B82Y10/00 ,  G02B6/1225 ,  H04B10/70 ,  H04L9/0858 ,  H04L2209/34

    摘要： A single photon source (1) comprises a vertical cavity structure (5), a lateral photonic crystal structure (13) and a single-electron turnstile (3). A quantum dot (2) is defined into which electrons are controllably introduced. The single-electron turnstile and photonic crystal structure is used to control emission characteristics of a photon from the quantum dot. Thus, photons can be emitted at a given rate, having a given configuration.

    摘要翻译： 单个光子源（1）包括垂直空腔结构（5），横向光子晶体结构（13）和单电子旋转门（3）。 定义了可控地引入电子的量子点（2）。 单电子旋转振荡器和光子晶体结构用于控制量子点的光子的发射特性。 因此，可以以给定的速率发射光子，具有给定的配置。