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公开(公告)号：EP4152325A1
公开(公告)日：2023-03-22
申请号：EP21828891.8
申请日：2021-06-21
发明人： JIN, Yongchen , LUO, Fei , WANG, Guoyu , CHEN, Ming , TANG, Yinzhong
摘要： This application provides a storage device, including a hard disk backplane, a first cascading board, and a hard disk array, where the hard disk array includes a plurality of hard disks; the hard disk array is located on a first side of the hard disk backplane; and the first cascading board is a field replaceable unit FRU, and the first cascading board is located on a second side of the hard disk backplane. The storage device in this application has a new cascading board architecture, can reduce costs of the storage device and improve maintainability of the storage device.
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公开(公告)号：EP4152170A1
公开(公告)日：2023-03-22
申请号：EP21818880.3
申请日：2021-02-10
发明人： LI, Yongyao , LUO, Fei , ZHU, Jiang
IPC分类号： G06F13/40
摘要： This application provides an equalization training method, apparatus, and system, including: obtaining a training rate of each of a master chip and a slave chip in a target phase of equalization training; and determining a target rate threshold interval within which the training rate in the target phase falls, determining, based on a correspondence between N+1 rate threshold intervals and N+1 equalization timeout periods, a target equalization timeout period corresponding to the target rate threshold interval, and configuring the target equalization timeout period as an equalization timeout period in the target phase, where equalization training in the target phase is performed on the master chip and the slave chip within the equalization timeout period in the target phase. According to this method, an equalization timeout period used for equalization training is flexibly configured for each equalization training process, so that the configured equalization timeout period more conforms to a training rate currently used for link negotiation, to better ensure that an equalization parameter is found within the configured equalization timeout period, thereby improving an equalization training success rate.
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公开(公告)号：EP4116836A1
公开(公告)日：2023-01-11
申请号：EP22175587.9
申请日：2019-01-07
发明人： LI, Yongyao , ZHU, Jiang , LUO, Fei , LI, Jiankang , MA, Yulong
摘要： This application provides an equalization time configuration method, applied to a processor system in which a PCIe or CCIX bus is used. The method includes: first determining a working PHY type of a master chip and a working PHY type of a slave chip (S103); and then determining an equalization time of the slave chip in a fourth phase of equalization based on the working PHY type of the master chip (S107), and determining an equalization time of the master chip in a third phase of the equalization based on the working PHY type of the slave chip (S107). This solution can help reduce a quantity of link negotiation failures resulting from equalization time insufficiency.
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公开(公告)号：EP3779711A1
公开(公告)日：2021-02-17
申请号：EP19806439.6
申请日：2019-01-07
发明人： LI, Yongyao , ZHU, Jiang , LUO, Fei , LI, Jiankang , MA, Yulong
摘要： This application provides an equalization time configuration method, applied to a processor system in which a PCIe or CCIX bus is used. The method includes: first determining a working PHY type of a master chip and a working PHY type of a slave chip; and then determining an equalization time of the slave chip in a fourth phase of equalization based on the working PHY type of the master chip, and determining an equalization time of the master chip in a third phase of the equalization based on the working PHY type of the slave chip. This solution can help reduce a quantity of link negotiation failures resulting from equalization time insufficiency. This application further provides an apparatus and a communications system that perform the method, and a chip mentioned when the method is performed.
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公开(公告)号：EP3779708A1
公开(公告)日：2021-02-17
申请号：EP19822954.4
申请日：2019-04-06
发明人： LI, Yongyao , LUO, Fei , NIE, Er
摘要： This application provides a fast equalization method, to reduce duration required in a link equalization process. The method includes: storing a receive parameter and a transmit parameter, of each of a primary chip and a secondary chip, that meet a link stability requirement and that are obtained when link equalization is previously performed; and when determining that link equalization needs to be performed, configuring, as first fast equalization timeout duration, a larger value in initial fast equalization timeout duration of the primary chip and initial fast equalization timeout duration of the secondary chip, and invoking first equalization parameters, so that the primary chip and the secondary chip perform a current time of link equalization based on the first fast equalization timeout duration and the foregoing transmit and receive parameters, where the first fast equalization timeout duration is equalization timeout duration that is of the primary chip in a third phase of equalization and that exists when the current time of link equalization is performed and equalization timeout duration that is of the primary chip in a fourth phase of equalization and that exists when the current time of link equalization is performed, and is equalization timeout duration that is of the secondary chip in the third phase of equalization and that exists when the current time of link equalization is performed and equalization timeout duration that is of the secondary chip in the fourth phase of equalization and that exists when the current time of link equalization is performed. Further, this application further provides an apparatus and a communications system for performing the method, and a chip mentioned in performing the method.
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公开(公告)号：EP3859541A1
公开(公告)日：2021-08-04
申请号：EP20735893.8
申请日：2020-01-02
发明人： LI, Yongyao , LUO, Fei , LI, Jiankang , WAN, Jie , JIA, Gongxian
摘要： This application provides a retimer application system, to help reduce a transmission delay. The application system includes a primary chip, a retimer, and a secondary chip. After first link training is completed, the retimer is configured to store, in a first storage area, an equalization parameter corresponding to each rate during the first link training, and data stored in the first storage area is not lost when the retimer performs a reset operation. The retimer is further configured to: receive a reset indication, and perform the reset operation according to the reset indication. The primary chip and the secondary chip are configured to perform second link training triggered by the reset indication. During the second link training, the retimer is further configured to: invoke the equalization parameter, and transparently transmit a training sequence in the second link training to the primary chip or the secondary chip based on the equalization parameter, to complete the second link training between the primary chip and the secondary chip.
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7.发明公开
公开(公告)号：EP4322165A1
公开(公告)日：2024-02-14
申请号：EP22814954.8
申请日：2022-05-05
发明人： XU, Shibin , WANG, Kejian , LUO, Fei , LI, Jiankang
摘要： Embodiments of this application disclose a data interface equalization adjustment method and apparatus, a device, and a storage medium, and relate to the field of data interface technologies. The method includes: A second device determines equalization parameter indication information of a first transmitter TX on a first data interface. The second device sends a first equalization training sequence block ETSB to a corresponding RX on the first data interface through a TX on a second data interface, where the first ETSB carries the equalization parameter indication information and equalization target indication information, and the equalization target indication information indicates that the first TX is an equalization target. The first device determines the equalization target to be the first TX based on the equalization target indication information, and adjusts an equalization parameter of the first TX to an equalization parameter indicated by the equalization parameter indication information. According to this application, equalization adjustment can be performed on a data interface having different quantities of TXs and RXs.
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公开(公告)号：EP4002696A1
公开(公告)日：2022-05-25
申请号：EP21193006.0
申请日：2018-11-06
发明人： LI, Yongyao , LI, Jiankang , YU, Jun , ZHU, Jiang , LUO, Fei
摘要： This application provides a link adjustment circuit. The link adjustment circuit comprises a link status circuit and a phase locked loop control circuit, wherein the link status circuit is configured to obtain a signal transmitted in a data channel circuit; the link status circuit is further configured to obtain link status information based on the obtained signal; the link status circuit is further configured to determine, based on the link status information, that a rate of a link needs to be changed; the phase locked loop control circuit is configured to: when the link status circuit determines that the rate of the link needs to be changed, configure an operating parameter of a target phase locked loop as an operating parameter corresponding to a changed rate, wherein the target phase locked loop is an unused phase locked loop in at least two phase locked loops; the link status circuit is further configured to detect that the link enters a rate-changing state; and the phase locked loop control circuit is further configured to switch a currently used phase locked loop to the target phase locked loop when the link status circuit detects that the link enters the rate-changing state.
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公开(公告)号：EP3886467A1
公开(公告)日：2021-09-29
申请号：EP18943345.1
申请日：2018-12-11
发明人： ZHANG, Qi , MA, Yanbin , CHEN, Minghui , LUO, Fei , XIE, Dong
IPC分类号： H04W4/02
摘要： This application provides a call method and a terminal device. The method includes: when roaming from a home public land mobile network HPLMN to a visited public land mobile network VPLMN, a terminal device obtains a first emergency number list of the VPLMN, where the first emergency number list includes at least one emergency number, and the emergency number corresponds to at least one emergency service type; the terminal device obtains a first number, and when the first number is an emergency number in a second emergency number list of the HPLMN and the first number is not an emergency number in the first emergency number list, determines a second number based on the first number, where the second number is the emergency number in the first emergency number list, and the second number and the first number correspond to a same emergency service type; and the terminal device initiates an emergency call based on the second number.
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公开(公告)号：EP3885923A1
公开(公告)日：2021-09-29
申请号：EP20744674.1
申请日：2020-01-21
发明人： LI, Yongyao , LUO, Fei , LI, Jiankang , ZHU, Jiang , ZENG, Jieping
IPC分类号： G06F13/40
摘要： This application provides a drive and a data transmission method, to implement low-latency transmission. The drive includes a CDR circuit, an elastic buffer, a receiver circuit, and a transmitter circuit. The CDR circuit is configured to recover a receive clock from a received signal. The receiver circuit is configured to recover sent data from the received signal by using the receive clock. The elastic buffer is configured to: move the data in by using the receive clock, and move the data out by using the receive clock. The transmitter circuit is configured to send, by using the receive clock, the sent data moved out from the elastic buffer.
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