公开(公告)号：EP1573803B1

公开(公告)日：2013-06-05

申请号：EP03814832.6

申请日：2003-12-15

申请人： Intel Corporation

发明人： DOCZY, Mark ,  KEATING, Steven ,  KAVALIEROS, Jack ,  DOYLE, Brian ,  BARNS, Chris ,  BARNAK, John ,  MCSWINEY, Michael ,  BRASK, Justin

IPC分类号： H01L21/8238

CPC分类号： H01L29/66545 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/7833 ,  Y10S438/926

公开(公告)号：EP1719163B1

公开(公告)日：2014-12-17

申请号：EP04816054.3

申请日：2004-12-24

申请人： Intel Corporation

发明人： CHAU, Robert ,  BRASK, Justin ,  BARNS, Chris ,  HARELAND, Scott

IPC分类号： H01L29/66 ,  H01L29/78

CPC分类号： H01L29/66545 ,  H01L29/7842

公开(公告)号：EP1573803A2

公开(公告)日：2005-09-14

申请号：EP03814832.6

申请日：2003-12-15

申请人： INTEL CORPORATION

发明人： DOCZY, Mark ,  KEATING, Steven ,  KAVALIEROS, Jack ,  DOYLE, Brian ,  BARNS, Chris ,  BARNAK, John ,  MCSWINEY, Michael ,  BRASK, Justin

IPC分类号： H01L21/8238

CPC分类号： H01L29/66545 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/7833 ,  Y10S438/926

摘要： At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.

公开(公告)号：EP1794790A1

公开(公告)日：2007-06-13

申请号：EP05817332.9

申请日：2005-09-16

申请人： Intel Corporation

发明人： DOCZY, Mark ,  BRASK, Justin ,  KAVALIEROS, Jack ,  BARNS, Chris ,  METZ, Matthew ,  DATTA, Suman ,  CHAU, Robert

IPC分类号： H01L21/8234 ,  H01L21/8238 ,  H01L21/336

CPC分类号： H01L21/823437 ,  H01L21/823828

摘要： A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A workfunction setting metal layer is formed over the metal barrier layer and a cap metal layer is formed over the workfunction setting metal layer.

公开(公告)号：EP1719163A1

公开(公告)日：2006-11-08

申请号：EP04816054.3

申请日：2004-12-24

申请人： Intel Corporation

发明人： CHAU, Robert ,  BRASK, Justin ,  BARNS, Chris ,  HARELAND, Scott

IPC分类号： H01L21/336

CPC分类号： H01L29/66545 ,  H01L29/7842

摘要： The present invention relates to the deposition of a layer (710) above a transistor structure, causing crystalline stress within the transistor, and resulting in increased performance. The stress layer may be formed above a plurality of transistors formed on a substrate, or above a plurality of selected transistors.