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公开(公告)号：EP1399919B1
公开(公告)日：2010-09-29
申请号：EP02737048.5
申请日：2002-05-22
发明人： CYRUSIAN, Sasan , BACH, Elmar
CPC分类号： G11B20/10055 , G11B5/012 , G11B20/10009
摘要： A write output driver with internal programmable pull-up resistive devices is disclosed. The write output driver provides an integrated output driver circuit configurable to provide near end transmission line termination. The output driver is configured to provide transmission of a high-speed signal with increased frequencies over prior output drivers. The output impedance of the output driver is programmable and maintained substantially constant, despite ambient fluctuations. An internal bias signal generator is provided to control the impedance of the output driver.
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2.发明公开HIGH-BANDWIDTH LOW-VOLTAGE GAIN CELL AND VOLTAGE FOLLOWER HAVING AN ENHANCED TRANSCONDUCTANCE 有权具有高带宽和电压福尔杰电路改进的边坡低电压增益单元
公开(公告)号：EP1417752A2
公开(公告)日：2004-05-12
申请号：EP02726934.9
申请日：2002-05-24
发明人： BACH, Elmar , BLON, Thomas , CYRUSIAN, Sasa , FRANCK, Stephen
IPC分类号： H03F3/45
CPC分类号： H03F3/45659 , H03F3/45206 , H03F2203/45418 , H03F2203/45454
摘要： A voltage buffer and follower includes a single ended output, a source follower, and a current feedback loop. The current feedback loop is coupled to the source follower and to the single ended output. When two voltage followers are used in a differential configuration, the voltage followers can become part of a high bandwidth gain cell. The high bandwidth gain cell includes a first and a second source follower circuit that are coupled to the first and the second current feedback loops, respectively. The first and the second source follower circuits are further coupled to a first and a second current mirror circuit, respectively. The first and second current mirror circuits are coupled to a load, which is coupled to a common-mode feedback circuit. The common-mode feedback circuit controls a constant current source that sinks mirrored direct currents that flow through the first and the second current mirror circuits.
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3.发明公开AN EFFICIENT ANALOG FRONT END FOR A READ/WRITE CHANNEL OF A HARD DISK DRIVE RUNNING FROM A HIGHLY REGULATED POWER SUPPLY 有权一种有效ANALOG前端为的硬驱动器中的读/写通道，OPERATE具有高稳压电源
公开(公告)号：EP1563500A1
公开(公告)日：2005-08-17
申请号：EP02808174.3
申请日：2002-11-22
发明人： CYRUSIAN, Sasan , FRANCK, Stephen, J. , ANNADORE, Sriharsha , BACH, Elmar , HART, Siegfried , BLON, Thomas , BLISS, William, G. , RAE, James, Wilson , RUEGG, Michael , HUEWELS, Ulrich , MISTLBERGER, Fritz
CPC分类号： G11B20/10009 , G11B20/1403
摘要： A method and apparatus for running an analog portion (162) of a read/write channel (108) from a highly regulated power supply (260). The apparatus includes an analog portion (162), a clock synthesizer (154), and a highly regulated power supply (260) connected to the analog portion (162) and the clock synthesizer (154). The analog portion (162) and the clock synthesizer (154) both comprise high voltage transistors which operate in a first voltage range and low voltage transistors which operate in a second voltage range, wherein the first voltage range is within the second voltage range. The highly regulated power supply (260) supplies power that is within the first voltage range to the analog portion (162) and the clock synthesizer (154). The method includes generating power that is within the first voltage range using the highly regulated power supply (260), and supplying the power to the analog portion (162) and the clock synthesizer (154).
摘要翻译： 一种用于从一个高度调节的电源（260）的读/写通道（108）的模拟部分（162）中运行的方法和装置。 该合成器装置包括：模拟部分（162），时钟（154），并连接到模拟部分（162）和时钟合成器（154）高度调节的电源（260）。 模拟部分（162）和时钟合成器（154）都包括其中在第一电压范围和低电压晶体管，其在第二电压范围内操作操作高压晶体管，worin所述第一电压范围是在第二电压范围内。 高度稳压电源（260）供给电力所做的是在第一电压范围内的模拟部分（162）和时钟合成器（154）内。 该方法包括生成功率所做的是使用高度稳压电源（260）和所述电力供应到模拟部分（162）和时钟合成器（154）的第一电压范围内。
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公开(公告)号：EP1402646A1
公开(公告)日：2004-03-31
申请号：EP02734563.6
申请日：2002-05-24
发明人： BACH, Elmar , CYRUSIAN, Sasan
CPC分类号： G11C27/026 , G11C27/02 , H03M1/1245
摘要： A sample-and-hold system that includes a first source follower having an input and an output and a second source follower that includes an input connected in series with the output of the first source follower and that furthermore comprises of a sample-and-hold switch connected to an output of the second source follower.
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5.发明授权HIGH-BANDWIDTH LOW-VOLTAGE GAIN CELL AND VOLTAGE FOLLOWER HAVING AN ENHANCED TRANSCONDUCTANCE 有权具有高带宽和电压福尔杰电路改进的边坡低电压增益单元
公开(公告)号：EP1417752B1
公开(公告)日：2006-07-12
申请号：EP02726934.9
申请日：2002-05-24
发明人： BACH, Elmar , BLON, Thomas , CYRUSIAN, Sasa , FRANCK, Stephen
IPC分类号： H03F3/45
CPC分类号： H03F3/45659 , H03F3/45206 , H03F2203/45418 , H03F2203/45454
摘要： A voltage buffer and follower includes a single ended output, a source follower, and a current feedback loop. The current feedback loop is coupled to the source follower and to the single ended output. When two voltage followers are used in a differential configuration, the voltage followers can become part of a high bandwidth gain cell. The high bandwidth gain cell includes a first and a second source follower circuit that are coupled to the first and the second current feedback loops, respectively. The first and the second source follower circuits are further coupled to a first and a second current mirror circuit, respectively. The first and second current mirror circuits are coupled to a load, which is coupled to a common-mode feedback circuit. The common-mode feedback circuit controls a constant current source that sinks mirrored direct currents that flow through the first and the second current mirror circuits.
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公开(公告)号：EP3474453A1
公开(公告)日：2019-04-24
申请号：EP18199434.4
申请日：2018-10-09
发明人： BACH, Elmar , STRAEUSSNIGG, Dietmar , VALLI, Luca
IPC分类号： H03M3/00
摘要： In accordance with an embodiment, a digital microphone interface circuit includes a delta-sigma analog-to-digital converter (ADC) having an input configured to be coupled to a microphone, a digital lowpass filter coupled to an output of the delta-sigma ADC, and a digital sigma-delta modulator coupled to an output of the digital lowpass filter. The delta-sigma ADC, the digital lowpass filter, and the digital sigma-delta modulator are configured to operate at different sampling frequencies.
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公开(公告)号：EP1402646B1
公开(公告)日：2006-03-01
申请号：EP02734563.6
申请日：2002-05-24
发明人： BACH, Elmar , CYRUSIAN, Sasan
CPC分类号： G11C27/026 , G11C27/02 , H03M1/1245
摘要： A sample-and-hold system that includes a first source follower having an input and an output and a second source follower that includes an input connected in series with the output of the first source follower and that furthermore comprises of a sample-and-hold switch connected to an output of the second source follower.
摘要翻译： 采样和保持系统包括具有输入和输出的第一源极跟随器和第二源极跟随器，第二源极跟随器包括与第一源极跟随器的输出串联连接的输入并且还包括采样和保持 开关连接到第二源极跟随器的输出端。
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公开(公告)号：EP1399919A1
公开(公告)日：2004-03-24
申请号：EP02737048.5
申请日：2002-05-22
发明人： CYRUSIAN, Sasan , BACH, Elmar
CPC分类号： G11B20/10055 , G11B5/012 , G11B20/10009
摘要： A write output driver with internal programmable pull-up resistive devices is disclosed. The write output driver provides an integrated output driver circuit configurable to provide near end transmission line termination. The output driver is configured to provide transmission of a high-speed signal with increased frequencies over prior output drivers. The output impedance of the output driver is programmable and maintained substantially constant, despite ambient fluctuations. An internal bias signal generator is provided to control the impedance of the output driver.
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