公开(公告)号：EP3396532A3

公开(公告)日：2019-03-13

申请号：EP18162628.4

申请日：2018-03-19

Applicant: INTEL Corporation

Inventor： SINHA, Kamal ,  VEMBU, Balaji ,  NURVITADHI, Eriko ,  GALOPPO VON BORRIES, Nicolas C. ,  BARIK, Rajkishore ,  LIN, Tsung-Han ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S. ,  CHEN, Xiaoming ,  YAO, Anbang ,  SHPEISMAN, Tatiana ,  APPU, Abhishek R. ,  KOKER, Altug ,  AKHBARI, Farshad ,  SRINIVASA, Narayan ,  CHEN, Feng ,  KIM, Dukhwan ,  SATISH, Nadathur Rajagopalan ,  WEAST, John C. ,  MACPHERSON, Mike B. ,  HURD, Linda L. ,  RANGANATHAN, Vasanth ,  JAHAGIRDAR, Sanjeev S.

IPC: G06F9/30 ,  G06F15/78 ,  G06F1/32 ,  G06T15/00

Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.

公开(公告)号：EP3401786A3

公开(公告)日：2019-02-13

申请号：EP18162597.1

申请日：2018-03-19

Applicant: INTEL Corporation

Inventor： LAKSHMANAN, Barath ,  HURD, Linda L. ,  ASHBAUGH, Ben J. ,  OULD-AHMED-VALL, Elmoustapha ,  MA, Liwei ,  JIN, Jingyi ,  GOTTSCHLICH, Justin E. ,  SAKTHIVEL, Chandrasekaran ,  STRICKLAND, Michael S. ,  LEWIS, Brian T. ,  KUPER, Lindsey ,  KOKER, Altug ,  APPU, Abhishek R. ,  SURTI, Prasoonkumar ,  RAY, Joydeep ,  VEMBU, Balaji ,  TUREK, Javier S. ,  FAROOQUI, Naila

IPC: G06F9/50

Abstract: One embodiment provides for a computing device within an autonomous vehicle, the compute device comprising a wireless network device to enable a wireless data connection with an autonomous vehicle network, a set of multiple processors including a general-purpose processor and a general-purpose graphics processor, the set of multiple processors to execute a compute manager to manage execution of compute workloads associated with the autonomous vehicle, the compute workload associated with autonomous operations of the autonomous vehicle, and offload logic configured to execute on the set of multiple processors, the offload logic to determine to offload one or more of the compute workloads to one or more autonomous vehicles within range of the wireless network device.

公开(公告)号：EP3396547A3

公开(公告)日：2018-11-28

申请号：EP18164092.1

申请日：2018-03-26

Applicant: Intel Corporation

Inventor： OULD-AHMED-VALL, Elmoustapha ,  BAGHSORKHI, Sara S. ,  YAO, Anbang ,  NEALIS, Kevin ,  CHEN, Xiaoming ,  KOKER, Altug ,  APPU, Abhishek R. ,  WEAST, John C. ,  MACPHERSON, Mike B. ,  KIM, Dukhwan ,  HURD, Linda L. ,  ASHBAUGH, Ben J. ,  LAKSHMANAN, Barath ,  MA, Liwei ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S.

IPC: G06F9/50 ,  G06T15/00 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06T1/20 ,  G06F3/14 ,  G06F7/483 ,  G06F9/30014 ,  G06F9/30185 ,  G06F9/3863 ,  G06F9/5044 ,  G06N3/0445 ,  G06N3/0454 ,  G06N3/063 ,  G06N3/084 ,  G06T1/60 ,  G06T15/005

Abstract: One embodiment provides for a general-purpose graphics processing unit comprising a dynamic precision floating-point unit including a control unit having precision tracking hardware logic to track an available number of bits of precision for computed data relative to a target precision, wherein the dynamic precision floating-point unit includes computational logic to output data at multiple precisions.

公开(公告)号：EP3396547A2

公开(公告)日：2018-10-31

申请号：EP18164092.1

申请日：2018-03-26

Applicant: Intel Corporation

Inventor： OULD-AHMED-VALL, Elmoustapha ,  BAGHSORKHI, Sara S. ,  YAO, Anbang ,  NEALIS, Kevin ,  CHEN, Xiaoming ,  KOKER, Altug ,  APPU, Abhishek R. ,  WEAST, John C. ,  MACPHERSON, Mike B. ,  KIM, Dukhwan ,  HURD, Linda L. ,  ASHBAUGH, Ben J. ,  LAKSHMANAN, Barath ,  MA, Liwei ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S.

IPC: G06F9/50

CPC classification number: G06T1/20 ,  G06F3/14 ,  G06F7/483 ,  G06F9/30014 ,  G06F9/30185 ,  G06F9/3863 ,  G06F9/5044 ,  G06N3/0445 ,  G06N3/0454 ,  G06N3/063 ,  G06N3/084 ,  G06T1/60 ,  G06T15/005

Abstract: One embodiment provides for a general-purpose graphics processing unit comprising a dynamic precision floating-point unit including a control unit having precision tracking hardware logic to track an available number of bits of precision for computed data relative to a target precision, wherein the dynamic precision floating-point unit includes computational logic to output data at multiple precisions.

公开(公告)号：EP4369252A3

公开(公告)日：2024-07-24

申请号：EP24166744.3

申请日：2018-03-19

Applicant: INTEL Corporation

Inventor： SINHA, Kamal ,  VEMBU, Balaji ,  NURVITADHI, Eriko ,  GALOPPO VON BORRIES, Nicolas C. ,  BARIK, Rajkishore ,  LIN, Tsung-Han ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S. ,  CHEN, Xiaoming ,  YAO, Anbang ,  SHPEISMAN, Tatiana ,  APPU, Abhishek R. ,  KOKER, Altug ,  AKHBARI, Farshad ,  SRINIVASA, Narayan ,  CHEN, Feng ,  KIM, Dukhwan ,  SATISH, Nadathur Rajagopalan ,  WEAST, John C. ,  MACPHERSON, Mike B. ,  HURD, Linda L. ,  RANGANATHAN, Vasanth ,  JAHAGIRDAR, Sanjeev S.

IPC: G06F9/30 ,  G06F15/76 ,  G06F15/78 ,  G06F1/32 ,  G06F1/3287 ,  G06F1/3293 ,  G06T1/20 ,  G06T15/00 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084

CPC classification number: G06F15/78 ,  G06F9/30014 ,  G06F9/30036 ,  G06F1/3287 ,  G06F1/3293 ,  G06T15/005 ,  G06F15/76 ,  G06N3/084 ,  G06N3/063 ,  G06T1/20 ,  Y02D10/00 ,  G06N3/044 ,  G06N3/045

Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.

公开(公告)号：EP4160413A1

公开(公告)日：2023-04-05

申请号：EP22204509.8

申请日：2018-03-26

Applicant: INTEL Corporation

Inventor： OULD-AHMED-VALL, ElMoustapha ,  BAGHSORKHI, Sara S. ,  YAO, Anbang ,  NEALIS, Kevin ,  CHEN, Xiaoming ,  KOKER, Altug ,  APPU, Abhishek R. ,  WEAST, John C. ,  MACPHERSON, Mike B. ,  KIM, Dukhwan ,  HURD, Linda L. ,  ASHBAUGH, Ben J. ,  LAKSHMANAN, Barath ,  MA, Liwei ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S.

IPC: G06F9/50 ,  G06T15/00 ,  G06F9/30 ,  G06F9/38 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08 ,  G06T1/20 ,  G06F12/0811 ,  G06N3/045 ,  G06N3/084 ,  G06N3/044

Abstract: In some example embodiments, there may be provided a multi-chip module accelerator usable to execute tensor data processing operations, the multi-chip module accelerator comprising a multi-chip module comprising a memory stack including multiple memory dies; and parallel processor circuitry communicatively coupled to the memory stack. The parallel processor circuitry comprising multiprocessor cores to execute matrix multiplication and accumulate operations, wherein the matrix multiplication and accumulate operations comprise floating-point operations; the floating-point operations are configurable to comprise two-dimensional matrix multiply and accumulate operations involving inputs that have differing floating-point precisions; the floating-point operations comprise a first operation at a first precision and a second operation at a second precision; and the first operation comprises a multiply having at least one 16-bit floating-point input and the second operation comprises an accumulate having a 32-bit floating-point input. Related systems, non-transitory machine-readable storage medium, methods and articles of manufacture are also described.

公开(公告)号：EP3401786A2

公开(公告)日：2018-11-14

申请号：EP18162597.1

申请日：2018-03-19

Applicant: INTEL Corporation

Inventor： LAKSHMANAN, Barath ,  HURD, Linda L. ,  ASHBAUGH, Ben J. ,  OULD-AHMED-VALL, Elmoustapha ,  MA, Liwei ,  JIN, Jingyi ,  GOTTSCHLICH, Justin E. ,  SAKTHIVEL, Chandrasekaran ,  STRICKLAND, Michael S. ,  LEWIS, Brian T. ,  KUPER, Lindsey ,  KOKER, Altug ,  APPU, Abhishek R. ,  SURTI, Prasoonkumar ,  RAY, Joydeep ,  VEMBU, Balaji ,  TUREK, Javier S. ,  FAROOQUI, Naila

IPC: G06F9/50

CPC classification number: G07C5/008 ,  G01C21/3415 ,  G01C21/3492 ,  G01S19/13 ,  G05D1/0088 ,  G05D1/0257 ,  G06F9/5027 ,  G06F2209/509 ,  G06N99/005 ,  G08G1/0112 ,  G08G1/012 ,  G08G1/052 ,  H04L43/0852 ,  H04L43/16 ,  H04L67/12 ,  H04W28/08

Abstract: One embodiment provides for a computing device within an autonomous vehicle, the compute device comprising a wireless network device to enable a wireless data connection with an autonomous vehicle network, a set of multiple processors including a general-purpose processor and a general-purpose graphics processor, the set of multiple processors to execute a compute manager to manage execution of compute workloads associated with the autonomous vehicle, the compute workload associated with autonomous operations of the autonomous vehicle, and offload logic configured to execute on the set of multiple processors, the offload logic to determine to offload one or more of the compute workloads to one or more autonomous vehicles within range of the wireless network device.

公开(公告)号：EP3396529A1

公开(公告)日：2018-10-31

申请号：EP18159839.2

申请日：2018-03-02

Applicant: INTEL Corporation

Inventor： APPU, Abhishek R. ,  KOKER, Altug ,  HURD, Linda L. ,  KIM, Dukhwan ,  MACPHERSON, Mike B. ,  WEAST, John C. ,  CHEN, Feng ,  AKHBARI, Farshad ,  SRINIVASA, Narayan ,  SATISH, Nadathur Rajagopalan ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S. ,  CHEN, Xiaoming ,  YAO, Anbang ,  SHPEISMAN, Tatiana

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/46 ,  G06T1/20 ,  G06N3/063

CPC classification number: G06T1/20 ,  G06F9/3001 ,  G06F9/3017 ,  G06F9/3851 ,  G06F9/3887 ,  G06F9/3895 ,  G06F9/46 ,  G06N3/063 ,  G06T15/005 ,  G06T15/04 ,  G09G5/363

Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes sorting logic to sort processing threads into thread groups based on bit depth of floating point thread operations.

公开(公告)号：EP4369252A2

公开(公告)日：2024-05-15

申请号：EP24166744.3

申请日：2018-03-19

Applicant: INTEL Corporation

Inventor： SINHA, Kamal ,  VEMBU, Balaji ,  NURVITADHI, Eriko ,  GALOPPO VON BORRIES, Nicolas C. ,  BARIK, Rajkishore ,  LIN, Tsung-Han ,  RAY, Joydeep ,  TANG, Ping T. ,  STRICKLAND, Michael S. ,  CHEN, Xiaoming ,  YAO, Anbang ,  SHPEISMAN, Tatiana ,  APPU, Abhishek R. ,  KOKER, Altug ,  AKHBARI, Farshad ,  SRINIVASA, Narayan ,  CHEN, Feng ,  KIM, Dukhwan ,  SATISH, Nadathur Rajagopalan ,  WEAST, John C. ,  MACPHERSON, Mike B. ,  HURD, Linda L. ,  RANGANATHAN, Vasanth ,  JAHAGIRDAR, Sanjeev S.

IPC: G06N3/045

CPC classification number: G06F15/78 ,  G06F9/30014 ,  G06F9/30036 ,  G06F1/3287 ,  G06F1/3293 ,  G06T15/005 ,  G06F15/76 ,  G06N3/084 ,  G06N3/063 ,  G06T1/20 ,  Y02D10/00 ,  G06N3/044 ,  G06N3/045

Abstract: In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.

公开(公告)号：EP4287590A3

公开(公告)日：2024-02-14

申请号：EP23204120.2

申请日：2018-03-19

Applicant: INTEL Corporation

Inventor： LAKSHMANAN, Barath ,  HURD, Linda L. ,  ASHBAUGH, Ben J. ,  OULD-AHMED-VALL, Elmoustapha ,  MA, Liwei ,  JIN, Jingyi ,  GOTTSCHLICH, Justin E. ,  SAKTHIVEL, Chandrasekaran ,  STRICKLAND, Michael S. ,  LEWIS, Brian T. ,  KUPER, Lindsey ,  KOKER, Altug ,  APPU, Abhishek R. ,  SURTI, Prasoonkumar ,  RAY, Joydeep ,  VEMBU, Balaji ,  TUREK, Javier S. ,  FAROOQUI, Naila

IPC: H04W4/40 ,  H04L67/12 ,  B60W50/00

Abstract: One embodiment provides for a method of performing machine learning operations for an autonomous vehicle, with determining that a computational workload is to be processed by a computing device of the autonomous vehicle, determining a first latency to a remote datacenter via an autonomous vehicle network, dispatching at least a first portion of the computational workload for processing via the remote datacenter when the first latency is below a threshold associated with the computational workload, determining a second latency to an autonomous vehicle within range of wireless network device in response to a determination that the first latency is above the threshold associated with the computational workload, and dispatching at least a second portion of the computational workload in response determining that the second latency is below the threshold associated with the computational workload.