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公开(公告)号：EP2176896B1
公开(公告)日：2012-11-21
申请号：EP08760731.3
申请日：2008-06-09
CPC分类号： H01L45/142 , C23C18/1204 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/1608
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2.发明授权RECTIFYING ELEMENT FOR A CROSSPOINT BASED MEMORY ARRAY ARCHITECTURE 有权同一份报告ELEMENT对于存储器阵列架构FOR交叉点BASE
公开(公告)号：EP2132750B1
公开(公告)日：2011-06-29
申请号：EP08708985.0
申请日：2008-02-14
CPC分类号： H01L27/2409 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0007 , G11C13/0011 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/32 , G11C2213/51 , G11C2213/71 , G11C2213/72 , G11C2213/76 , H01L27/224
摘要： An asymmetrically programmed memory material (such as a solid electrolyte material) is described for use as a rectifying element for driving symmetric or substantially symmetric resistive memory elements in a crosspoint memory architecture. A solid electrolyte element (SE) has very high resistance in the OFF state and very low resistance in the ON state (because it is a metallic filament in the ON state). These attributes make it a near ideal diode. During the passage of current (during program/read/erase) of the memory element, the solid electrolyte material also programs into the low resistance state. The final state of the solid electrolyte material is reverted to a high resistance state while making sure that the final state of the memory material is the one desired.
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公开(公告)号：EP4356299A1
公开(公告)日：2024-04-24
申请号：EP22735340.6
申请日：2022-06-09
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公开(公告)号：EP4356236A1
公开(公告)日：2024-04-24
申请号：EP22735341.4
申请日：2022-06-09
发明人： LICHTENAU, Cedric , GOPALAKRISHNAN, Kailash , SRINIVASAN, Vijayalakshmi , SAPORITO, Anthony , SHUKLA, Sunil , VENKATARAMANI, Swagath
IPC分类号： G06F7/76
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公开(公告)号：EP2176896A1
公开(公告)日：2010-04-21
申请号：EP08760731.3
申请日：2008-06-09
CPC分类号： H01L45/142 , C23C18/1204 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/1608
摘要： The present disclosure relates to a solid electrolyte device comprising an amorphous chalcogenide solid active electrolytic layer (3) located between first and second metallic layers (1, 4). The amorphous chalcogenide solid active electrolytic layer is prepared by obtaining a solution of a hydrazine-based precursor, to a metal chalcogenide; applying the solution onto a substrate; and thereafter annealing the precursor to convert the precursor to the amorphous metal chalcogenide. The present disclosure also relates to processes for fabricating the solid electrolyte device.
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公开(公告)号：EP4356298A1
公开(公告)日：2024-04-24
申请号：EP22735338.0
申请日：2022-06-09
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7.发明公开RECTIFYING ELEMENT FOR A CROSSPOINT BASED MEMORY ARRAY ARCHITECTURE 有权同一份报告ELEMENT对于存储器阵列架构FOR交叉点BASE
公开(公告)号：EP2132750A1
公开(公告)日：2009-12-16
申请号：EP08708985.0
申请日：2008-02-14
CPC分类号： H01L27/2409 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C13/0007 , G11C13/0011 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/32 , G11C2213/51 , G11C2213/71 , G11C2213/72 , G11C2213/76 , H01L27/224
摘要： An asymmetrically programmed memory material (such as a solid electrolyte material) is described for use as a rectifying element for driving symmetric or substantially symmetric resistive memory elements in a crosspoint memory architecture. A solid electrolyte element (SE) has very high resistance in the OFF state and very low resistance in the ON state (because it is a metallic filament in the ON state). These attributes make it a near ideal diode. During the passage of current (during program/read/erase) of the memory element, the solid electrolyte material also programs into the low resistance state. The final state of the solid electrolyte material is reverted to a high resistance state while making sure that the final state of the memory material is the one desired.
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