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    SENSE AMPLIFIER
    1.
    发明授权
    SENSE AMPLIFIER 有权

    公开(公告)号：EP3200191B1

    公开(公告)日：2018-12-05

    申请号：EP16204024.0

    申请日：2016-12-14

    Applicant: NXP USA, Inc.

    Inventor： Choy, Jon Scott

    IPC: G11C13/00 ,  G11C11/16

    CPC classification number: G11C11/1673 ,  G11C7/065 ,  G11C11/1659 ,  G11C11/1693 ,  G11C11/1695 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C27/024 ,  G11C2013/0054 ,  G11C2013/0057 ,  G11C2213/74 ,  G11C2213/79

    Abstract: In a non-volatile memory, a method of performing a sensing operation to read a non-volatile (NV) element includes a first and a second phase. During the first phase, the NV element is coupled via a sense path transistor to a first capacitive element at a first input of an amplifier stage and a reference cell is coupled via a reference sense path transistor to a second capacitive element at a second input of the amplifier stage. During the second phase, the NV element is coupled via the sense path transistor to the second capacitive element and the reference cell is coupled via the reference sense path transistor to the first capacitive element. During the first phase, the first and second capacitive elements are initialized to voltages representative of states of the NV element and reference cell, respectively. During the second phase, the voltage differential between the two voltages is amplified.

    SIGNAL PROCESSING CIRCUIT
    3.
    发明公开
    SIGNAL PROCESSING CIRCUIT 审中-公开
    信号处理电路

    公开(公告)号：EP3282449A1

    公开(公告)日：2018-02-14

    申请号：EP15893702.9

    申请日：2015-06-02

    Applicant: Huawei Technologies Co. Ltd.

    Inventor： ZHANG, Yide ,  ZENG, Zhigang ,  ZHU, Yidong ,  CAO, Mingfu ,  ZHAO, Junfeng

    IPC: G11C13/00

    CPC classification number: G11C13/0002 ,  G11C8/16 ,  G11C13/0028 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/74 ,  G11C2213/79

    Abstract: A circuit (100) is provided. A first end (108) of a resistive random access memory (102) included in the circuit (100) is a first end of the circuit (100), and a second end (116) of the resistive random access memory is connected to a first end (118) of a first switching device (104) and a first end (120) of a second switching device (106) separately, where a threshold voltage of the resistive random access memory (102) is U; a second end (112) of the first switching device (104) is a second end of the circuit; a second end of the second switching device (106) is a third end (110) of the circuit; the first switching device (104) further includes a first control end (114); the second switching device (106) further includes a second control end (122); and the first control end (114) and the second control end (122) are configured to make the first switching device (104) closed and make the second switching device (106) open at the same time, or to make the first switching device (104) open and make the second switching device (106) closed at the same time. Therefore, a working status of the resistive random access memory (102) is flexibly controlled.

    Abstract translation: 电路（100）被提供。 包括在电路（100）中的电阻随机存取存储器（102）的第一端（108）是电路（100）的第一端，并且电阻式随机存取存储器的第二端（116）连接到 第一开关装置104的第一端118与第二开关装置106的第一端120分开，其中电阻式随机存取存储器102的阈值电压为U; 所述第一开关装置（104）的第二端（112）是所述电路的第二端; 所述第二开关装置（106）的第二端是所述电路的第三端（110） 第一开关装置（104）还包括第一控制端（114）; 所述第二开关装置（106）还包括第二控制端（122）; ，第一控制端（114）和第二控制端（122）用于使第一开关装置（104）闭合并使第二开关装置（106）同时断开，或者使第一开关装置 （104）打开并使第二开关装置（106）同时闭合。 因此，电阻随机存取存储器（102）的工作状态被灵活控制。

    SENSE AMPLIFIER
    5.
    发明公开
    SENSE AMPLIFIER 审中-公开

    公开(公告)号：EP3200191A1

    公开(公告)日：2017-08-02

    申请号：EP16204024.0

    申请日：2016-12-14

    Applicant: NXP USA, Inc.

    Inventor： Choy, Jon Scott

    IPC: G11C13/00 ,  G11C11/16

    CPC classification number: G11C11/1673 ,  G11C7/065 ,  G11C11/1659 ,  G11C11/1693 ,  G11C11/1695 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C27/024 ,  G11C2013/0054 ,  G11C2013/0057 ,  G11C2213/74 ,  G11C2213/79

    Abstract: In a non-volatile memory, a method of performing a sensing operation to read a non-volatile (NV) element includes a first and a second phase. During the first phase, the NV element is coupled via a sense path transistor to a first capacitive element at a first input of an amplifier stage and a reference cell is coupled via a reference sense path transistor to a second capacitive element at a second input of the amplifier stage. During the second phase, the NV element is coupled via the sense path transistor to the second capacitive element and the reference cell is coupled via the reference sense path transistor to the first capacitive element. During the first phase, the first and second capacitive elements are initialized to voltages representative of states of the NV element and reference cell, respectively. During the second phase, the voltage differential between the two voltages is amplified.

    Abstract translation: 在非易失性存储器中，执行感测操作以读取非易失性（NV）元件的方法包括第一阶段和第二阶段。 在第一阶段期间，NV元件经由感测路径晶体管耦合到放大器级的第一输入处的第一电容元件，并且参考单元经由参考感测路径晶体管耦合到第二输入处的第二电容元件 放大器阶段。 在第二阶段期间，NV元件经由感测路径晶体管耦合到第二电容元件，并且参考单元经由参考感测路径晶体管耦合到第一电容元件。 在第一阶段期间，第一和第二电容性元件分别被初始化为表示NV元件和参考单元的状态的电压。 在第二阶段，两个电压之间的电压差被放大。

    CIRCUIT AND SYSTEM OF USING JUNCTION DIODE AS PROGRAM SELECTOR FOR ONE-TIME PROGRAMMABLE DEVICES
    7.
    发明公开
    CIRCUIT AND SYSTEM OF USING JUNCTION DIODE AS PROGRAM SELECTOR FOR ONE-TIME PROGRAMMABLE DEVICES 审中-公开
    电路和系统使用表面二极管作为选民PROGRAM独特的可编程器件

    公开(公告)号：EP3069350A1

    公开(公告)日：2016-09-21

    申请号：EP14901820.2

    申请日：2014-09-19

    Applicant: Chung, Shine C.

    Inventor： Chung, Shine C.

    IPC: G11C17/16 ,  G11C17/18

    CPC classification number: G11C17/16 ,  G11C13/003 ,  G11C17/18 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2436

    Abstract: Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuses. At least one portion of the electrical fuse can have at least one extended area to accelerate programming. The program selector can be a diode or MOS that can be turned on through the channel or the source/drain junction. The OTP device can have the at least one OTP element coupled to at least one diode in a memory cell. A method of programming electrical fuses reliably is also disclosed. Advantageously, by controlled programming where programming current is maintained below a critical current, programming is reliable. In another embodiment, a programmable resistive device cell can use at least one MOS device as selector which can be programmed or read by turning on a source junction diode of the MOS or a channel of the MOS.

    Abstract translation: 在标准CMOS逻辑工艺制造的结二极管可被用作程序选择为一次性可编程（OTP）装置，颜色：例如电熔丝。 电熔丝的至少一个部分可以具有至少一个扩展区域加速编程。 节目选择器可以是二极管或MOS确实可以通过该通道或源极/漏极结接通。 所述OTP设备可具有耦合到至少一个二极管的存储单元的所述至少一个OTP元件。 编程电熔丝可靠gibt盘的方法，游离缺失。 有利地，通过控制编程，其中编程电流维持在低于一个临界电流，编程是可靠的。 在另一个实施例的可编程电阻器件单元可使用至少一个MOS器件作为选择可以通过接通MOS的源极结二极管或MOS的沟道被编程或读取。

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