Continuous barcode marking system
    1.
    发明公开
    Continuous barcode marking system 失效
    条形码标记系统。

    公开(公告)号:EP0623887A1

    公开(公告)日:1994-11-09

    申请号:EP94106391.9

    申请日:1994-04-25

    IPC分类号: G06K1/12 G06K15/00 G06K19/08

    摘要: A method and apparatus is provided for producing single width barcodes in a continuous, serpentine pattern. This pattern provides continuity of operation for laser marking instruments and thereby results in the formation of more uniform and higher quality barcode indicia. The use of a continuous serpentine pattern also increases the speed at which the code may be written onto a substrate. This marking method is particularly appropriate for use in marking a wide variety of materials including semiconductors, metals, plastics and ceramics.

    摘要翻译: 提供了一种用于以连续的蛇形图案生产单个宽度条形码的方法和装置。 这种图案为激光打标仪提供连续的操作,从而形成更均匀和更高质量的条形码标记。 连续蛇形图案的使用也增加了代码可写入基板的速度。 该标记方法特别适用于标记各种材料,包括半导体,金属,塑料和陶瓷。

    Presence/absence bar code with bidirectionality feature
    3.
    发明公开
    Presence/absence bar code with bidirectionality feature 失效
    存在/禁止条码与双向特征

    公开(公告)号:EP0472842A3

    公开(公告)日:1992-10-21

    申请号:EP91110227.5

    申请日:1991-06-21

    IPC分类号: G06K19/06

    摘要: A single width bidirectional bar code exhibiting inherent self clocking characteristics is provided so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described herein are robust, reliable and highly readable even in the face of relatively high variations in scanning speed. The codes are also desirably dense in terms of character representations per linear measurements, an important consideration in semiconductor manufacturing wherein space on chips and wafers is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences.

    Presence/absence bar code with bidirectionality feature
    4.
    发明公开
    Presence/absence bar code with bidirectionality feature 失效
    具有双向性功能的存在/不存在条形码

    公开(公告)号:EP0472842A2

    公开(公告)日:1992-03-04

    申请号:EP91110227.5

    申请日:1991-06-21

    IPC分类号: G06K19/06

    摘要: A single width bidirectional bar code exhibiting inherent self clocking characteristics is provided so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described herein are robust, reliable and highly readable even in the face of relatively high variations in scanning speed. The codes are also desirably dense in terms of character representations per linear measurements, an important consideration in semiconductor manufacturing wherein space on chips and wafers is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences.

    摘要翻译: 提供了表现出固有自时钟特性的单宽度双向条形码,以便在超大规模集成电路制造工艺中识别半导体晶片时特别有用。 即使面对扫描速度的相对高的变化,本文描述的代码也是稳健的,可靠的和高度可读的。 代码在每个线性测量的字符表示方面也是理想的密集的,这是半导体制造中的重要考虑因素,其中芯片和晶片上的空间非常重要。 此外,本发明的一个优选实施例展现了码符号序列中相邻条之间的最大空格数的最小数目。

    Memory system restructured by deterministic permutation algorithm
    6.
    发明公开
    Memory system restructured by deterministic permutation algorithm 失效
    通过确定性定理算法重构的存储器系统

    公开(公告)号:EP0090219A3

    公开(公告)日:1986-12-03

    申请号:EP83102354

    申请日:1983-03-10

    IPC分类号: G06F11/10

    CPC分类号: G11C29/88 G06F11/1024

    摘要: Swapping of physical bits between different logical words of a memory (40) is accomplished by reference to data (46) on bad bits in the memory. Different permutation data (34) are selected to control address inputs to each bit position (12i) in a memory word so that any word with multiple uncorrectable data is changed to a correctable logical data word by placing one or more of the bad bits in the original word into another word of the memory. The swapping is done by an exclusionary process (48) which identifies and deselects certain deleterious potential combinations of actual addresses thereby limiting the selection process to ohter combinations. The process can involve categorizing (44) of failures in accordance with type, and performing (48) algorithm operations which identify combinations of bit addresses that would result in combining the failures so that there are more errors in any memory word than would be correctable by the error correction code monitoring (42) the memory.

    Memory system restructured by deterministic permutation algorithm
    7.
    发明公开
    Memory system restructured by deterministic permutation algorithm 失效
    通过确定置换算法Restruktuiert存储系统。

    公开(公告)号:EP0090219A2

    公开(公告)日:1983-10-05

    申请号:EP83102354.4

    申请日:1983-03-10

    IPC分类号: G06F11/10 G06F11/00

    CPC分类号: G11C29/88 G06F11/1024

    摘要: Swapping of physical bits between different logical words of a memory (40) is accomplished by reference to data (46) on bad bits in the memory. Different permutation data (34) are selected to control address inputs to each bit position (12i) in a memory word so that any word with multiple uncorrectable data is changed to a correctable logical data word by placing one or more of the bad bits in the original word into another word of the memory. The swapping is done by an exclusionary process (48) which identifies and deselects certain deleterious potential combinations of actual addresses thereby limiting the selection process to ohter combinations. The process can involve categorizing (44) of failures in accordance with type, and performing (48) algorithm operations which identify combinations of bit addresses that would result in combining the failures so that there are more errors in any memory word than would be correctable by the error correction code monitoring (42) the memory.